Commit c2307b7f authored by Tvrtko Ursulin's avatar Tvrtko Ursulin
Browse files

drm/i915: Move setting of rps thresholds to init 



Since 36d516be ("drm/i915/gt: Switch to manual evaluation of RPS")
thresholds are invariant so lets move their setting to init time.

Signed-off-by: default avatarTvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@kernel.org>
Reviewed-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: default avatarAndi Shyti <andi.shyti@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230717164013.826614-1-tvrtko.ursulin@linux.intel.com
parent 8529e377

drivers/gpu/drm/i915/gt/intel_rps.c

+16 −11
Original line number Diff line number Diff line
@@ -669,7 +669,6 @@ static void rps_set_power(struct intel_rps *rps, int new_power) 
{

	struct intel_gt *gt = rps_to_gt(rps);

	struct intel_uncore *uncore = gt->uncore;

	u32 threshold_up = 0, threshold_down = 0; /* in % */

	u32 ei_up = 0, ei_down = 0;



	lockdep_assert_held(&rps->power.mutex);
@@ -677,9 +676,6 @@ static void rps_set_power(struct intel_rps *rps, int new_power) 
	if (new_power == rps->power.mode)

		return;



	threshold_up = 95;

	threshold_down = 85;



	/* Note the units here are not exactly 1us, but 1280ns. */

	switch (new_power) {

	case LOW_POWER:
@@ -706,17 +702,22 @@ static void rps_set_power(struct intel_rps *rps, int new_power) 


	GT_TRACE(gt,

		 "changing power mode [%d], up %d%% @ %dus, down %d%% @ %dus\n",

		 new_power, threshold_up, ei_up, threshold_down, ei_down);

		 new_power,

		 rps->power.up_threshold, ei_up,

		 rps->power.down_threshold, ei_down);



	set(uncore, GEN6_RP_UP_EI,

	    intel_gt_ns_to_pm_interval(gt, ei_up * 1000));

	set(uncore, GEN6_RP_UP_THRESHOLD,

	    intel_gt_ns_to_pm_interval(gt, ei_up * threshold_up * 10));

	    intel_gt_ns_to_pm_interval(gt,

				       ei_up * rps->power.up_threshold * 10));



	set(uncore, GEN6_RP_DOWN_EI,

	    intel_gt_ns_to_pm_interval(gt, ei_down * 1000));

	set(uncore, GEN6_RP_DOWN_THRESHOLD,

	    intel_gt_ns_to_pm_interval(gt, ei_down * threshold_down * 10));

	    intel_gt_ns_to_pm_interval(gt,

				       ei_down *

				       rps->power.down_threshold * 10));



	set(uncore, GEN6_RP_CONTROL,

	    (GRAPHICS_VER(gt->i915) > 9 ? 0 : GEN6_RP_MEDIA_TURBO) |
@@ -728,8 +729,6 @@ static void rps_set_power(struct intel_rps *rps, int new_power) 


skip_hw_write:

	rps->power.mode = new_power;

	rps->power.up_threshold = threshold_up;

	rps->power.down_threshold = threshold_down;

}



static void gen6_rps_set_thresholds(struct intel_rps *rps, u8 val)
@@ -1555,10 +1554,12 @@ void intel_rps_enable(struct intel_rps *rps) 
		return;



	GT_TRACE(rps_to_gt(rps),

		 "min:%x, max:%x, freq:[%d, %d]\n",

		 "min:%x, max:%x, freq:[%d, %d], thresholds:[%u, %u]\n",

		 rps->min_freq, rps->max_freq,

		 intel_gpu_freq(rps, rps->min_freq),

		 intel_gpu_freq(rps, rps->max_freq));

		 intel_gpu_freq(rps, rps->max_freq),

		 rps->power.up_threshold,

		 rps->power.down_threshold);



	GEM_BUG_ON(rps->max_freq < rps->min_freq);

	GEM_BUG_ON(rps->idle_freq > rps->max_freq);
@@ -2011,6 +2012,10 @@ void intel_rps_init(struct intel_rps *rps) 
		}

	}



	/* Set default thresholds in % */

	rps->power.up_threshold = 95;

	rps->power.down_threshold = 85;



	/* Finally allow us to boost to max by default */

	rps->boost_freq = rps->max_freq;

	rps->idle_freq = rps->min_freq;