Commit c21cdbf2 authored by Jiansong Chen's avatar Jiansong Chen Committed by Zheng Zengkai
Browse files

drm/amdgpu: remove unsafe optimization to drop preamble ib 

stable inclusion
from stable-5.10.51
commit 8fa6473a61ecc9972ad543d8ba1d927d442d1f67
bugzilla: 175263 https://gitee.com/openeuler/kernel/issues/I4DT6F

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=8fa6473a61ecc9972ad543d8ba1d927d442d1f67



--------------------------------

[ Upstream commit 7d9c70d2 ]

Take the situation with gfxoff, the optimization may cause
corrupt CE ram contents. In addition emit_cntxcntl callback
has similar optimization which firmware can handle properly
even for power feature.

Signed-off-by: default avatarJiansong Chen <Jiansong.Chen@amd.com>
Reviewed-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarSasha Levin <sashal@kernel.org>
Signed-off-by: default avatarChen Jun <chenjun102@huawei.com>
Acked-by: default avatarWeilong Chen <chenweilong@huawei.com>
Signed-off-by: default avatarChen Jun <chenjun102@huawei.com>
Signed-off-by: default avatarZheng Zengkai <zhengzengkai@huawei.com>
parent e6c82f8c

drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c

+1 −10
Original line number Diff line number Diff line
@@ -128,7 +128,7 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs, 
	struct amdgpu_device *adev = ring->adev;

	struct amdgpu_ib *ib = &ibs[0];

	struct dma_fence *tmp = NULL;

	bool skip_preamble, need_ctx_switch;

	bool need_ctx_switch;

	unsigned patch_offset = ~0;

	struct amdgpu_vm *vm;

	uint64_t fence_ctx;
@@ -221,7 +221,6 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs, 
	if (need_ctx_switch)

		status |= AMDGPU_HAVE_CTX_SWITCH;



	skip_preamble = ring->current_ctx == fence_ctx;

	if (job && ring->funcs->emit_cntxcntl) {

		status |= job->preamble_status;

		status |= job->preemption_status;
@@ -239,14 +238,6 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs, 
	for (i = 0; i < num_ibs; ++i) {

		ib = &ibs[i];



		/* drop preamble IBs if we don't have a context switch */

		if ((ib->flags & AMDGPU_IB_FLAG_PREAMBLE) &&

		    skip_preamble &&

		    !(status & AMDGPU_PREAMBLE_IB_PRESENT_FIRST) &&

		    !amdgpu_mcbp &&

		    !amdgpu_sriov_vf(adev)) /* for SRIOV preemption, Preamble CE ib must be inserted anyway */

			continue;



		if (job && ring->funcs->emit_frame_cntl) {

			if (secure != !!(ib->flags & AMDGPU_IB_FLAGS_SECURE)) {

				amdgpu_ring_emit_frame_cntl(ring, false, secure);