Commit c1e70ec4 authored by Thomas Gleixner's avatar Thomas Gleixner Committed by Aichun Shi
Browse files

x86/cpu: Switch to arch_cpu_finalize_init() 

stable inclusion
from stable-v5.10.189
commit e5eb18e164d08986543f8259d0cc10e120fb8746
category: bugfix
bugzilla: https://gitee.com/openeuler/intel-kernel/issues/I8LVBS
CVE: N/A
Reference: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=e5eb18e164d08986543f8259d0cc10e120fb8746



-------------------------------------

Intel-SIG: commit e5eb18e164d0 ("x86/cpu: Switch to arch_cpu_finalize_init()")
Backport x86 related patches from 5.10.189 upstream

-------------------------------------

commit 7c7077a7 upstream

check_bugs() is a dumping ground for finalizing the CPU bringup. Only parts of
it has to do with actual CPU bugs.

Split it apart into arch_cpu_finalize_init() and cpu_select_mitigations().

Fixup the bogus 32bit comments while at it.

No functional change.

Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
Reviewed-by: default avatarBorislav Petkov (AMD) <bp@alien8.de>
Link: https://lore.kernel.org/r/20230613224545.019583869@linutronix.de


Signed-off-by: default avatarDaniel Sneddon <daniel.sneddon@linux.intel.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: default avatarAichun Shi <aichun.shi@intel.com>
parent caaeb527

arch/x86/Kconfig

+1 −0
Original line number Diff line number Diff line
@@ -61,6 +61,7 @@ config X86 
	select ARCH_32BIT_OFF_T			if X86_32

	select ARCH_CLOCKSOURCE_INIT

	select ARCH_HAS_ACPI_TABLE_UPGRADE	if ACPI

	select ARCH_HAS_CPU_FINALIZE_INIT

	select ARCH_HAS_DEBUG_VIRTUAL

	select ARCH_HAS_DEBUG_VM_PGTABLE	if !X86_PAE

	select ARCH_HAS_DEVMEM_IS_ALLOWED

arch/x86/include/asm/bugs.h

+0 −2
Original line number Diff line number Diff line
@@ -4,8 +4,6 @@ 


#include <asm/processor.h>



extern void check_bugs(void);



#if defined(CONFIG_CPU_SUP_INTEL) && defined(CONFIG_X86_32)

int ppro_with_ram_bug(void);

#else

arch/x86/kernel/cpu/bugs.c

+1 −50
Original line number Diff line number Diff line
@@ -9,7 +9,6 @@ 
 *	- Andrew D. Balsa (code cleanup).

 */

#include <linux/init.h>

#include <linux/utsname.h>

#include <linux/cpu.h>

#include <linux/module.h>

#include <linux/nospec.h>
@@ -27,8 +26,6 @@ 
#include <asm/msr.h>

#include <asm/vmx.h>

#include <asm/paravirt.h>

#include <asm/alternative.h>

#include <asm/set_memory.h>

#include <asm/intel-family.h>

#include <asm/e820/api.h>

#include <asm/hypervisor.h>
@@ -123,21 +120,8 @@ EXPORT_SYMBOL_GPL(mds_idle_clear); 
DEFINE_STATIC_KEY_FALSE(mmio_stale_data_clear);

EXPORT_SYMBOL_GPL(mmio_stale_data_clear);



void __init check_bugs(void)

void __init cpu_select_mitigations(void)

{

	identify_boot_cpu();



	/*

	 * identify_boot_cpu() initialized SMT support information, let the

	 * core code know.

	 */

	cpu_smt_check_topology();



	if (!IS_ENABLED(CONFIG_SMP)) {

		pr_info("CPU: ");

		print_cpu_info(&boot_cpu_data);

	}



	/*

	 * Read the SPEC_CTRL MSR to account for reserved bits which may

	 * have unknown values. AMD64_LS_CFG MSR is cached in the early AMD
@@ -180,39 +164,6 @@ void __init check_bugs(void) 
	 */

	srso_select_mitigation();

	gds_select_mitigation();



	arch_smt_update();



#ifdef CONFIG_X86_32

	/*

	 * Check whether we are able to run this kernel safely on SMP.

	 *

	 * - i386 is no longer supported.

	 * - In order to run on anything without a TSC, we need to be

	 *   compiled for a i486.

	 */

	if (boot_cpu_data.x86 < 4)

		panic("Kernel requires i486+ for 'invlpg' and other features");



	init_utsname()->machine[1] =

		'0' + (boot_cpu_data.x86 > 6 ? 6 : boot_cpu_data.x86);

	alternative_instructions();



	fpu__init_check_bugs();

#else /* CONFIG_X86_64 */

	alternative_instructions();



	/*

	 * Make sure the first 2MB area is not mapped by huge pages

	 * There are typically fixed size MTRRs in there and overlapping

	 * MTRRs into large pages causes slow downs.

	 *

	 * Right now we don't do that with gbpages because there seems

	 * very little benefit for that case.

	 */

	if (!direct_gbpages)

		set_memory_4k((unsigned long)__va(0), 1);

#endif

}



/*

arch/x86/kernel/cpu/common.c

+53 −0
Original line number Diff line number Diff line
@@ -19,10 +19,13 @@ 
#include <linux/kprobes.h>

#include <linux/kgdb.h>

#include <linux/smp.h>

#include <linux/cpu.h>

#include <linux/io.h>

#include <linux/syscore_ops.h>

#include <linux/pgtable.h>

#include <linux/utsname.h>



#include <asm/alternative.h>

#include <asm/cmdline.h>

#include <asm/stackprotector.h>

#include <asm/perf_event.h>
@@ -59,6 +62,7 @@ 
#include <asm/cpu_device_id.h>

#include <asm/uv/uv.h>

#include <asm/sigframe.h>

#include <asm/set_memory.h>



#include "cpu.h"
@@ -2235,3 +2239,52 @@ void arch_smt_update(void) 
	/* Check whether IPI broadcasting can be enabled */

	apic_smt_update();

}



void __init arch_cpu_finalize_init(void)

{

	identify_boot_cpu();



	/*

	 * identify_boot_cpu() initialized SMT support information, let the

	 * core code know.

	 */

	cpu_smt_check_topology();



	if (!IS_ENABLED(CONFIG_SMP)) {

		pr_info("CPU: ");

		print_cpu_info(&boot_cpu_data);

	}



	cpu_select_mitigations();



	arch_smt_update();



	if (IS_ENABLED(CONFIG_X86_32)) {

		/*

		 * Check whether this is a real i386 which is not longer

		 * supported and fixup the utsname.

		 */

		if (boot_cpu_data.x86 < 4)

			panic("Kernel requires i486+ for 'invlpg' and other features");



		init_utsname()->machine[1] =

			'0' + (boot_cpu_data.x86 > 6 ? 6 : boot_cpu_data.x86);

	}



	alternative_instructions();



	if (IS_ENABLED(CONFIG_X86_64)) {

		/*

		 * Make sure the first 2MB area is not mapped by huge pages

		 * There are typically fixed size MTRRs in there and overlapping

		 * MTRRs into large pages causes slow downs.

		 *

		 * Right now we don't do that with gbpages because there seems

		 * very little benefit for that case.

		 */

		if (!direct_gbpages)

			set_memory_4k((unsigned long)__va(0), 1);

	} else {

		fpu__init_check_bugs();

	}

}

arch/x86/kernel/cpu/cpu.h

+1 −0
Original line number Diff line number Diff line
@@ -78,6 +78,7 @@ extern void detect_ht(struct cpuinfo_x86 *c); 
extern void check_null_seg_clears_base(struct cpuinfo_x86 *c);



unsigned int aperfmperf_get_khz(int cpu);

void cpu_select_mitigations(void);



extern void x86_spec_ctrl_setup_ap(void);

extern void update_srbds_msr(void);