Commit c1a988f1 authored by AngeloGioacchino Del Regno's avatar AngeloGioacchino Del Regno Committed by Stephen Boyd
Browse files

clk: mediatek: mt8167: Compress GATE_TOPx macros 



Use the GATE_MTK macro to compress the GATE_TOP{0..5} macros.
No functional changes.

Signed-off-by: default avatarAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: default avatarChen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20230306140543.1813621-16-angelogioacchino.delregno@collabora.com


Signed-off-by: default avatarStephen Boyd <sboyd@kernel.org>
parent ffe91cb2

drivers/clk/mediatek/clk-mt8167.c

+16 −64
Original line number Diff line number Diff line
@@ -736,77 +736,29 @@ static const struct mtk_gate_regs top5_cg_regs = { 
	.sta_ofs = 0x44,

};



#define GATE_TOP0(_id, _name, _parent, _shift) {	\

		.id = _id,				\

		.name = _name,				\

		.parent_name = _parent,			\

		.regs = &top0_cg_regs,			\

		.shift = _shift,			\

		.ops = &mtk_clk_gate_ops_setclr,	\

	}

#define GATE_TOP0(_id, _name, _parent, _shift) \

	GATE_MTK(_id, _name, _parent, &top0_cg_regs, _shift, &mtk_clk_gate_ops_setclr)



#define GATE_TOP0_I(_id, _name, _parent, _shift) {	\

		.id = _id,				\

		.name = _name,				\

		.parent_name = _parent,			\

		.regs = &top0_cg_regs,			\

		.shift = _shift,			\

		.ops = &mtk_clk_gate_ops_setclr_inv,	\

	}

#define GATE_TOP0_I(_id, _name, _parent, _shift) \

	GATE_MTK(_id, _name, _parent, &top0_cg_regs, _shift, &mtk_clk_gate_ops_setclr_inv)



#define GATE_TOP1(_id, _name, _parent, _shift) {	\

		.id = _id,				\

		.name = _name,				\

		.parent_name = _parent,			\

		.regs = &top1_cg_regs,			\

		.shift = _shift,			\

		.ops = &mtk_clk_gate_ops_setclr,	\

	}

#define GATE_TOP1(_id, _name, _parent, _shift) \

	GATE_MTK(_id, _name, _parent, &top1_cg_regs, _shift, &mtk_clk_gate_ops_setclr)



#define GATE_TOP2(_id, _name, _parent, _shift) {	\

		.id = _id,				\

		.name = _name,				\

		.parent_name = _parent,			\

		.regs = &top2_cg_regs,			\

		.shift = _shift,			\

		.ops = &mtk_clk_gate_ops_setclr,	\

	}

#define GATE_TOP2(_id, _name, _parent, _shift) \

	GATE_MTK(_id, _name, _parent, &top2_cg_regs, _shift, &mtk_clk_gate_ops_setclr)



#define GATE_TOP2_I(_id, _name, _parent, _shift) {	\

		.id = _id,				\

		.name = _name,				\

		.parent_name = _parent,			\

		.regs = &top2_cg_regs,			\

		.shift = _shift,			\

		.ops = &mtk_clk_gate_ops_setclr_inv,	\

	}

#define GATE_TOP2_I(_id, _name, _parent, _shift) \

	GATE_MTK(_id, _name, _parent, &top2_cg_regs, _shift, &mtk_clk_gate_ops_setclr_inv)



#define GATE_TOP3(_id, _name, _parent, _shift) {	\

		.id = _id,				\

		.name = _name,				\

		.parent_name = _parent,			\

		.regs = &top3_cg_regs,			\

		.shift = _shift,			\

		.ops = &mtk_clk_gate_ops_setclr,	\

	}

#define GATE_TOP3(_id, _name, _parent, _shift) \

	GATE_MTK(_id, _name, _parent, &top3_cg_regs, _shift, &mtk_clk_gate_ops_setclr)



#define GATE_TOP4_I(_id, _name, _parent, _shift) {	\

		.id = _id,				\

		.name = _name,				\

		.parent_name = _parent,			\

		.regs = &top4_cg_regs,			\

		.shift = _shift,			\

		.ops = &mtk_clk_gate_ops_setclr_inv,	\

	}

#define GATE_TOP4_I(_id, _name, _parent, _shift) \

	GATE_MTK(_id, _name, _parent, &top4_cg_regs, _shift, &mtk_clk_gate_ops_setclr_inv)



#define GATE_TOP5(_id, _name, _parent, _shift) {	\

		.id = _id,				\

		.name = _name,				\

		.parent_name = _parent,			\

		.regs = &top5_cg_regs,			\

		.shift = _shift,			\

		.ops = &mtk_clk_gate_ops_no_setclr,	\

	}

#define GATE_TOP5(_id, _name, _parent, _shift) \

	GATE_MTK(_id, _name, _parent, &top5_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr)



static const struct mtk_gate top_clks[] __initconst = {

	/* TOP0 */