Commit c19d966e authored by Hal Feng's avatar Hal Feng Committed by Stephen Boyd
Browse files

clk: starfive: Delete the redundant dev_set_drvdata() in JH7110 clock drivers 



The dev_set_drvdata() is no longer needed after we used a wrapper
struct to get the data in auxiliary driver.

Cc: Xingyu Wu <xingyu.wu@starfivetech.com>
Fixes: d1aae066 ("clk: starfive: Avoid casting iomem pointers")
Signed-off-by: default avatarHal Feng <hal.feng@starfivetech.com>
Link: https://lore.kernel.org/r/20230417074115.30786-3-hal.feng@starfivetech.com


Signed-off-by: default avatarStephen Boyd <sboyd@kernel.org>
parent d1aae066

drivers/clk/starfive/clk-starfive-jh7110-aon.c

+0 −2
Original line number Diff line number Diff line
@@ -83,8 +83,6 @@ static int jh7110_aoncrg_probe(struct platform_device *pdev) 
	if (IS_ERR(priv->base))

		return PTR_ERR(priv->base);



	dev_set_drvdata(priv->dev, (void *)(&priv->base));



	for (idx = 0; idx < JH7110_AONCLK_END; idx++) {

		u32 max = jh7110_aonclk_data[idx].max;

		struct clk_parent_data parents[4] = {};

drivers/clk/starfive/clk-starfive-jh7110-sys.c

+0 −2
Original line number Diff line number Diff line
@@ -402,8 +402,6 @@ static int __init jh7110_syscrg_probe(struct platform_device *pdev) 
	if (IS_ERR(priv->base))

		return PTR_ERR(priv->base);



	dev_set_drvdata(priv->dev, (void *)(&priv->base));



	/*

	 * These PLL clocks are not actually fixed factor clocks and can be

	 * controlled by the syscon registers of JH7110. They will be dropped