Commit c19d3eac authored by Dillon Varone's avatar Dillon Varone Committed by Alex Deucher
Browse files

drm/amd/display: Use correct pixel clock to program DTBCLK DTO's 



[Why?]
Currently phy_pix_clk is used to program DTO's which is incorrect.

[How?]
Use the timing pixel clock to program DTO's correctly.

Reviewed-by: default avatarMartin Leung <Martin.Leung@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Acked-by: default avatarQingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: default avatarDillon Varone <Dillon.Varone@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 2fd23d46

drivers/gpu/drm/amd/display/dc/link/link_hwss_hpo_dp.c

+1 −1
Original line number Diff line number Diff line
@@ -111,7 +111,7 @@ static void setup_hpo_dp_stream_encoder(struct pipe_ctx *pipe_ctx) 
	enum phyd32clk_clock_source phyd32clk = get_phyd32clk_src(pipe_ctx->stream->link);



	dto_params.otg_inst = tg->inst;

	dto_params.pixclk_khz = pipe_ctx->stream->phy_pix_clk;

	dto_params.pixclk_khz = pipe_ctx->stream->timing.pix_clk_100hz / 10;

	dto_params.num_odm_segments = get_odm_segment_count(pipe_ctx);

	dto_params.timing = &pipe_ctx->stream->timing;

	dto_params.ref_dtbclk_khz = dc->clk_mgr->funcs->get_dtb_ref_clk_frequency(dc->clk_mgr);