Commit c17414a2 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'sh-for-v6.5-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/glaubitz/sh-linux 

Pull sh updates from Adrian Glaubitz:
 "Fix a compiler warning in the J2 probing code and a fix by Sergey
  Shtylyov to avoid using IRQ0 on SH3 and SH4 targets. Masahiro Yamada
  made some clean-up in the build system to address reports by the 0day
  bot.

  The most notable changes come from Artur Rojek who addressed a number
  of issues in the DMA code, in particular a fix for the DMA channel
  offset calculation that was introduced in in 7f47c718 ("sh: dma:
  More legacy cpu dma chainsawing.") in 2012!

  Together with another change to correct the number of DMA channels for
  each SuperH SoC according to specification, Artur's series unbreaks
  the kernel on the SH7709 SoC allowing Linux to boot on the HP Jornada
  680 handheld again.

  Summary:

   - Provide unxlate_dev_mem_ptr() in asm/io.h

   - dma: Correct the number of DMA channels for SH7709

   - dma: Drop incorrect SH_DMAC_BASE1 definition for SH4

   - dma: Fix DMA channel offset calculation

   - Remove compiler flag duplication

   - Refactor header include path addition

   - Move build rule for cchips/hd6446x/ to arch/sh/Kbuild

   - Fix -Wmissing-include-dirs warnings for various platforms

   - Avoid using IRQ0 on SH3 and SH4

   - j2: Use ioremap() to translate device tree address into kernel
     memory"

* tag 'sh-for-v6.5-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/glaubitz/sh-linux:
  sh: Provide unxlate_dev_mem_ptr() in asm/io.h
  sh: dma: Correct the number of DMA channels for SH7709
  sh: dma: Drop incorrect SH_DMAC_BASE1 definition for SH4
  sh: dma: Fix DMA channel offset calculation
  sh: Remove compiler flag duplication
  sh: Refactor header include path addition
  sh: Move build rule for cchips/hd6446x/ to arch/sh/Kbuild
  sh: Fix -Wmissing-include-dirs warnings for various platforms
  sh: Avoid using IRQ0 on SH3 and SH4
  sh: j2: Use ioremap() to translate device tree address into kernel memory
parents 7afb9d76 7497840d

arch/sh/Kbuild

+2 −0
Original line number Diff line number Diff line
@@ -3,5 +3,7 @@ obj-y += kernel/ mm/ boards/ 
obj-$(CONFIG_SH_FPU_EMU)	+= math-emu/

obj-$(CONFIG_USE_BUILTIN_DTB)	+= boot/dts/



obj-$(CONFIG_HD6446X_SERIES)	+= cchips/hd6446x/



# for cleaning

subdir- += boot

arch/sh/Makefile

+2 −24
Original line number Diff line number Diff line
@@ -116,35 +116,16 @@ export ld-bfd 


# Mach groups

machdir-$(CONFIG_SOLUTION_ENGINE)		+= mach-se

machdir-$(CONFIG_SH_HP6XX)			+= mach-hp6xx

machdir-$(CONFIG_SH_DREAMCAST)			+= mach-dreamcast

machdir-$(CONFIG_SH_SH03)			+= mach-sh03

machdir-$(CONFIG_SH_RTS7751R2D)			+= mach-r2d

machdir-$(CONFIG_SH_HIGHLANDER)			+= mach-highlander

machdir-$(CONFIG_SH_MIGOR)			+= mach-migor

machdir-$(CONFIG_SH_AP325RXA)			+= mach-ap325rxa

machdir-$(CONFIG_SH_KFR2R09)			+= mach-kfr2r09

machdir-$(CONFIG_SH_ECOVEC)			+= mach-ecovec24

machdir-$(CONFIG_SH_SDK7780)			+= mach-sdk7780

machdir-$(CONFIG_SH_SDK7786)			+= mach-sdk7786

machdir-$(CONFIG_SH_X3PROTO)			+= mach-x3proto

machdir-$(CONFIG_SH_SH7763RDP)			+= mach-sh7763rdp

machdir-$(CONFIG_SH_SH4202_MICRODEV)		+= mach-microdev

machdir-$(CONFIG_SH_LANDISK)			+= mach-landisk

machdir-$(CONFIG_SH_LBOX_RE2)			+= mach-lboxre2

machdir-$(CONFIG_SH_RSK)			+= mach-rsk



ifneq ($(machdir-y),)

core-y	+= $(addprefix arch/sh/boards/, \

	     $(filter-out ., $(patsubst %,%/,$(machdir-y))))

endif



# Common machine type headers. Not part of the arch/sh/boards/ hierarchy.

machdir-y					+= mach-common



# Companion chips

core-$(CONFIG_HD6446X_SERIES)	+= arch/sh/cchips/hd6446x/



#

# CPU header paths

#
@@ -164,11 +145,8 @@ cpuincdir-y += cpu-common # Must be last 


drivers-y			+= arch/sh/drivers/



cflags-y	+= $(foreach d, $(cpuincdir-y), -I $(srctree)/arch/sh/include/$(d)) \

		   $(foreach d, $(machdir-y), -I $(srctree)/arch/sh/include/$(d))



KBUILD_CPPFLAGS		+= $(addprefix -I $(srctree)/arch/sh/include/, $(cpuincdir-y) $(machdir-y))

KBUILD_CFLAGS		+= -pipe $(cflags-y)

KBUILD_CPPFLAGS		+= $(cflags-y)

KBUILD_AFLAGS		+= $(cflags-y)



ifeq ($(CONFIG_MCOUNT),y)

arch/sh/boards/Makefile

+19 −0
Original line number Diff line number Diff line
@@ -18,3 +18,22 @@ obj-$(CONFIG_SH_APSH4A3A) += board-apsh4a3a.o 
obj-$(CONFIG_SH_APSH4AD0A)	+= board-apsh4ad0a.o



obj-$(CONFIG_SH_DEVICE_TREE)	+= of-generic.o



obj-$(CONFIG_SOLUTION_ENGINE)	+= mach-se/

obj-$(CONFIG_SH_HP6XX)		+= mach-hp6xx/

obj-$(CONFIG_SH_DREAMCAST)	+= mach-dreamcast/

obj-$(CONFIG_SH_SH03)		+= mach-sh03/

obj-$(CONFIG_SH_RTS7751R2D)	+= mach-r2d/

obj-$(CONFIG_SH_HIGHLANDER)	+= mach-highlander/

obj-$(CONFIG_SH_MIGOR)		+= mach-migor/

obj-$(CONFIG_SH_AP325RXA)	+= mach-ap325rxa/

obj-$(CONFIG_SH_KFR2R09)	+= mach-kfr2r09/

obj-$(CONFIG_SH_ECOVEC)		+= mach-ecovec24/

obj-$(CONFIG_SH_SDK7780)	+= mach-sdk7780/

obj-$(CONFIG_SH_SDK7786)	+= mach-sdk7786/

obj-$(CONFIG_SH_X3PROTO)	+= mach-x3proto/

obj-$(CONFIG_SH_SH7763RDP)	+= mach-sh7763rdp/

obj-$(CONFIG_SH_SH4202_MICRODEV)+= mach-microdev/

obj-$(CONFIG_SH_LANDISK)	+= mach-landisk/

obj-$(CONFIG_SH_LBOX_RE2)	+= mach-lboxre2/

obj-$(CONFIG_SH_RSK)		+= mach-rsk/

arch/sh/drivers/dma/Kconfig

+8 −6
Original line number Diff line number Diff line
@@ -28,17 +28,19 @@ config SH_DMA_API 
config NR_ONCHIP_DMA_CHANNELS

	int

	depends on SH_DMA

	default "4" if CPU_SUBTYPE_SH7750  || CPU_SUBTYPE_SH7751  || \

		       CPU_SUBTYPE_SH7750S || CPU_SUBTYPE_SH7091

	default "4" if CPU_SUBTYPE_SH7709 || CPU_SUBTYPE_SH7750  || \

		       CPU_SUBTYPE_SH7750S || CPU_SUBTYPE_SH7751 || \

		       CPU_SUBTYPE_SH7091

	default "8" if CPU_SUBTYPE_SH7750R || CPU_SUBTYPE_SH7751R || \

		       CPU_SUBTYPE_SH7760

	default "12" if CPU_SUBTYPE_SH7723 || CPU_SUBTYPE_SH7780  || \

			CPU_SUBTYPE_SH7785 || CPU_SUBTYPE_SH7724

	default "12" if CPU_SUBTYPE_SH7723 || CPU_SUBTYPE_SH7724  || \

			CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785

	default "6"

	help

	  This allows you to specify the number of channels that the on-chip

	  DMAC supports. This will be 4 for SH7750/SH7751/Sh7750S/SH7091 and 8 for the

	  SH7750R/SH7751R/SH7760, 12 for the SH7723/SH7780/SH7785/SH7724, default is 6.

	  DMAC supports. This will be 4 for SH7709/SH7750/SH7750S/SH7751/SH7091,

	  8 for SH7750R/SH7751R/SH7760, and 12 for SH7723/SH7724/SH7780/SH7785.

	  Default is 6.



config SH_DMABRG

	bool "SH7760 DMABRG support"

arch/sh/drivers/dma/dma-sh.c

+24 −13
Original line number Diff line number Diff line
@@ -18,6 +18,18 @@ 
#include <cpu/dma-register.h>

#include <cpu/dma.h>



/*

 * Some of the SoCs feature two DMAC modules. In such a case, the channels are

 * distributed equally among them.

 */

#ifdef	SH_DMAC_BASE1

#define	SH_DMAC_NR_MD_CH	(CONFIG_NR_ONCHIP_DMA_CHANNELS / 2)

#else

#define	SH_DMAC_NR_MD_CH	CONFIG_NR_ONCHIP_DMA_CHANNELS

#endif



#define	SH_DMAC_CH_SZ		0x10



/*

 * Define the default configuration for dual address memory-memory transfer.

 * The 0x400 value represents auto-request, external->external.
@@ -29,7 +41,7 @@ static unsigned long dma_find_base(unsigned int chan) 
	unsigned long base = SH_DMAC_BASE0;



#ifdef SH_DMAC_BASE1

	if (chan >= 6)

	if (chan >= SH_DMAC_NR_MD_CH)

		base = SH_DMAC_BASE1;

#endif
@@ -40,13 +52,13 @@ static unsigned long dma_base_addr(unsigned int chan) 
{

	unsigned long base = dma_find_base(chan);



	/* Normalize offset calculation */

	if (chan >= 9)

		chan -= 6;

	if (chan >= 4)

		base += 0x10;

	chan = (chan % SH_DMAC_NR_MD_CH) * SH_DMAC_CH_SZ;



	/* DMAOR is placed inside the channel register space. Step over it. */

	if (chan >= DMAOR)

		base += SH_DMAC_CH_SZ;



	return base + (chan * 0x10);

	return base + chan;

}



#ifdef CONFIG_SH_DMA_IRQ_MULTI
@@ -250,12 +262,11 @@ static int sh_dmac_get_dma_residue(struct dma_channel *chan) 
#define NR_DMAOR	1

#endif



/*

 * DMAOR bases are broken out amongst channel groups. DMAOR0 manages

 * channels 0 - 5, DMAOR1 6 - 11 (optional).

 */

#define dmaor_read_reg(n)		__raw_readw(dma_find_base((n)*6))

#define dmaor_write_reg(n, data)	__raw_writew(data, dma_find_base(n)*6)

#define dmaor_read_reg(n)		__raw_readw(dma_find_base((n) * \

						    SH_DMAC_NR_MD_CH) + DMAOR)

#define dmaor_write_reg(n, data)	__raw_writew(data, \

						     dma_find_base((n) * \

						     SH_DMAC_NR_MD_CH) + DMAOR)



static inline int dmaor_reset(int no)

{