Loading arch/arm/boot/dts/imx7d.dtsi +20 −0 Original line number Diff line number Diff line Loading @@ -704,6 +704,26 @@ status = "disabled"; }; flexcan1: can@30a00000 { compatible = "fsl,imx7d-flexcan", "fsl,imx6q-flexcan"; reg = <0x30a00000 0x10000>; interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clks IMX7D_CLK_DUMMY>, <&clks IMX7D_CAN1_ROOT_CLK>; clock-names = "ipg", "per"; status = "disabled"; }; flexcan2: can@30a10000 { compatible = "fsl,imx7d-flexcan", "fsl,imx6q-flexcan"; reg = <0x30a10000 0x10000>; interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clks IMX7D_CLK_DUMMY>, <&clks IMX7D_CAN2_ROOT_CLK>; clock-names = "ipg", "per"; status = "disabled"; }; i2c1: i2c@30a20000 { #address-cells = <1>; #size-cells = <0>; Loading Loading
arch/arm/boot/dts/imx7d.dtsi +20 −0 Original line number Diff line number Diff line Loading @@ -704,6 +704,26 @@ status = "disabled"; }; flexcan1: can@30a00000 { compatible = "fsl,imx7d-flexcan", "fsl,imx6q-flexcan"; reg = <0x30a00000 0x10000>; interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clks IMX7D_CLK_DUMMY>, <&clks IMX7D_CAN1_ROOT_CLK>; clock-names = "ipg", "per"; status = "disabled"; }; flexcan2: can@30a10000 { compatible = "fsl,imx7d-flexcan", "fsl,imx6q-flexcan"; reg = <0x30a10000 0x10000>; interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clks IMX7D_CLK_DUMMY>, <&clks IMX7D_CAN2_ROOT_CLK>; clock-names = "ipg", "per"; status = "disabled"; }; i2c1: i2c@30a20000 { #address-cells = <1>; #size-cells = <0>; Loading