Commit c133df69 authored by Ville Syrjälä's avatar Ville Syrjälä
Browse files

drm/i915: Introduce .{enable,disable}_clock() encoder vfuncs 



The current code dealing with the clock routing for DDI encoders
is a maintenance nightmare. Let's start cleaning it up by allowing
the encoder to provide vfuncs for enablign/disabling the clock.

We leave them initially unimplemented, falling back to the old
if-else approach.

v2: Convert the FDI enable sequence

Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> #v2
Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210205214634.19341-3-ville.syrjala@linux.intel.com
parent ad952982

drivers/gpu/drm/i915/display/intel_ddi.c

+23 −6
Original line number Original line Diff line number Diff line
@@ -1929,6 +1929,23 @@ static void intel_ddi_clk_disable(struct intel_encoder *encoder) 
	}

	}

}

}





void intel_ddi_enable_clock(struct intel_encoder *encoder,

			    const struct intel_crtc_state *crtc_state)

{

	if (encoder->enable_clock)

		encoder->enable_clock(encoder, crtc_state);

	else

		intel_ddi_clk_select(encoder, crtc_state);

}



static void intel_ddi_disable_clock(struct intel_encoder *encoder)

{

	if (encoder->disable_clock)

		encoder->disable_clock(encoder);

	else

		intel_ddi_clk_disable(encoder);

}



static void

static void

icl_program_mg_dp_mode(struct intel_digital_port *dig_port,

icl_program_mg_dp_mode(struct intel_digital_port *dig_port,

		       const struct intel_crtc_state *crtc_state)

		       const struct intel_crtc_state *crtc_state)
@@ -2173,7 +2190,7 @@ static void tgl_ddi_pre_enable_dp(struct intel_atomic_state *state, 
	 * hsw_crtc_enable()->intel_enable_shared_dpll().  We need only

	 * hsw_crtc_enable()->intel_enable_shared_dpll().  We need only

	 * configure the PLL to port mapping here.

	 * configure the PLL to port mapping here.

	 */

	 */

	intel_ddi_clk_select(encoder, crtc_state);

	intel_ddi_enable_clock(encoder, crtc_state);





	/* 5. If IO power is controlled through PWR_WELL_CTL, Enable IO Power */

	/* 5. If IO power is controlled through PWR_WELL_CTL, Enable IO Power */

	if (!intel_phy_is_tc(dev_priv, phy) ||

	if (!intel_phy_is_tc(dev_priv, phy) ||
@@ -2294,7 +2311,7 @@ static void hsw_ddi_pre_enable_dp(struct intel_atomic_state *state, 




	intel_pps_on(intel_dp);

	intel_pps_on(intel_dp);





	intel_ddi_clk_select(encoder, crtc_state);

	intel_ddi_enable_clock(encoder, crtc_state);





	if (!intel_phy_is_tc(dev_priv, phy) ||

	if (!intel_phy_is_tc(dev_priv, phy) ||

	    dig_port->tc_mode != TC_PORT_TBT_ALT) {

	    dig_port->tc_mode != TC_PORT_TBT_ALT) {
@@ -2369,7 +2386,7 @@ static void intel_ddi_pre_enable_hdmi(struct intel_atomic_state *state, 
	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);

	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);





	intel_dp_dual_mode_set_tmds_output(intel_hdmi, true);

	intel_dp_dual_mode_set_tmds_output(intel_hdmi, true);

	intel_ddi_clk_select(encoder, crtc_state);

	intel_ddi_enable_clock(encoder, crtc_state);





	drm_WARN_ON(&dev_priv->drm, dig_port->ddi_io_wakeref);

	drm_WARN_ON(&dev_priv->drm, dig_port->ddi_io_wakeref);

	dig_port->ddi_io_wakeref = intel_display_power_get(dev_priv,

	dig_port->ddi_io_wakeref = intel_display_power_get(dev_priv,
@@ -2521,7 +2538,7 @@ static void intel_ddi_post_disable_dp(struct intel_atomic_state *state, 
					dig_port->ddi_io_power_domain,

					dig_port->ddi_io_power_domain,

					fetch_and_zero(&dig_port->ddi_io_wakeref));

					fetch_and_zero(&dig_port->ddi_io_wakeref));





	intel_ddi_clk_disable(encoder);

	intel_ddi_disable_clock(encoder);

}

}





static void intel_ddi_post_disable_hdmi(struct intel_atomic_state *state,

static void intel_ddi_post_disable_hdmi(struct intel_atomic_state *state,
@@ -2544,7 +2561,7 @@ static void intel_ddi_post_disable_hdmi(struct intel_atomic_state *state, 
				dig_port->ddi_io_power_domain,

				dig_port->ddi_io_power_domain,

				fetch_and_zero(&dig_port->ddi_io_wakeref));

				fetch_and_zero(&dig_port->ddi_io_wakeref));





	intel_ddi_clk_disable(encoder);

	intel_ddi_disable_clock(encoder);





	intel_dp_dual_mode_set_tmds_output(intel_hdmi, false);

	intel_dp_dual_mode_set_tmds_output(intel_hdmi, false);

}

}
@@ -2644,7 +2661,7 @@ void intel_ddi_fdi_post_disable(struct intel_atomic_state *state, 
	intel_de_write(dev_priv, FDI_RX_CTL(PIPE_A), val);

	intel_de_write(dev_priv, FDI_RX_CTL(PIPE_A), val);





	intel_disable_ddi_buf(encoder, old_crtc_state);

	intel_disable_ddi_buf(encoder, old_crtc_state);

	intel_ddi_clk_disable(encoder);

	intel_ddi_disable_clock(encoder);





	val = intel_de_read(dev_priv, FDI_RX_MISC(PIPE_A));

	val = intel_de_read(dev_priv, FDI_RX_MISC(PIPE_A));

	val &= ~(FDI_RX_PWRDN_LANE1_MASK | FDI_RX_PWRDN_LANE0_MASK);

	val &= ~(FDI_RX_PWRDN_LANE1_MASK | FDI_RX_PWRDN_LANE0_MASK);

drivers/gpu/drm/i915/display/intel_ddi.h

+2 −2
Original line number Original line Diff line number Diff line
@@ -28,7 +28,7 @@ void intel_ddi_fdi_post_disable(struct intel_atomic_state *state, 
				struct intel_encoder *intel_encoder,

				struct intel_encoder *intel_encoder,

				const struct intel_crtc_state *old_crtc_state,

				const struct intel_crtc_state *old_crtc_state,

				const struct drm_connector_state *old_conn_state);

				const struct drm_connector_state *old_conn_state);

void intel_ddi_clk_select(struct intel_encoder *encoder,

void intel_ddi_enable_clock(struct intel_encoder *encoder,

			    const struct intel_crtc_state *crtc_state);

			    const struct intel_crtc_state *crtc_state);

void intel_prepare_dp_ddi_buffers(struct intel_encoder *encoder,

void intel_prepare_dp_ddi_buffers(struct intel_encoder *encoder,

				  const struct intel_crtc_state *crtc_state);

				  const struct intel_crtc_state *crtc_state);

drivers/gpu/drm/i915/display/intel_display_types.h

+6 −0
Original line number Original line Diff line number Diff line
@@ -220,6 +220,12 @@ struct intel_encoder { 
	 * encoders have been disabled and suspended.

	 * encoders have been disabled and suspended.

	 */

	 */

	void (*shutdown)(struct intel_encoder *encoder);

	void (*shutdown)(struct intel_encoder *encoder);

	/*

	 * Enable/disable the clock to the port.

	 */

	void (*enable_clock)(struct intel_encoder *encoder,

			     const struct intel_crtc_state *crtc_state);

	void (*disable_clock)(struct intel_encoder *encoder);

	enum hpd_pin hpd_pin;

	enum hpd_pin hpd_pin;

	enum intel_display_power_domain power_domain;

	enum intel_display_power_domain power_domain;

	/* for communication with audio component; protected by av_mutex */

	/* for communication with audio component; protected by av_mutex */

drivers/gpu/drm/i915/display/intel_fdi.c

+1 −1
Original line number Original line Diff line number Diff line
@@ -596,7 +596,7 @@ void hsw_fdi_link_train(struct intel_encoder *encoder, 




	/* Configure Port Clock Select */

	/* Configure Port Clock Select */

	drm_WARN_ON(&dev_priv->drm, crtc_state->shared_dpll->info->id != DPLL_ID_SPLL);

	drm_WARN_ON(&dev_priv->drm, crtc_state->shared_dpll->info->id != DPLL_ID_SPLL);

	intel_ddi_clk_select(encoder, crtc_state);

	intel_ddi_enable_clock(encoder, crtc_state);





	/* Start the training iterating through available voltages and emphasis,

	/* Start the training iterating through available voltages and emphasis,

	 * testing each value twice. */

	 * testing each value twice. */