Commit c0f05a6a authored by Remi Pommarel's avatar Remi Pommarel Committed by Lorenzo Pieralisi
Browse files

PCI: aardvark: Fix PCI_EXP_RTCTL register configuration 



PCI_EXP_RTCTL is used to activate PME interrupt only, so writing into it
should not modify other interrupts' mask. The ISR mask polarity was also
inverted, when PCI_EXP_RTCTL_PMEIE is set PCIE_MSG_PM_PME_MASK mask bit
should actually be cleared.

Fixes: 8a3ebd8d ("PCI: aardvark: Implement emulated root PCI bridge config space")
Signed-off-by: default avatarRemi Pommarel <repk@triplefau.lt>
Signed-off-by: default avatarLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: default avatarThomas Petazzoni <thomas.petazzoni@bootlin.com>
parent f4c7d053

drivers/pci/controller/pci-aardvark.c

+9 −4
Original line number Diff line number Diff line
@@ -436,7 +436,7 @@ advk_pci_bridge_emul_pcie_conf_read(struct pci_bridge_emul *bridge, 


	case PCI_EXP_RTCTL: {

		u32 val = advk_readl(pcie, PCIE_ISR0_MASK_REG);

		*value = (val & PCIE_MSG_PM_PME_MASK) ? PCI_EXP_RTCTL_PMEIE : 0;

		*value = (val & PCIE_MSG_PM_PME_MASK) ? 0 : PCI_EXP_RTCTL_PMEIE;

		return PCI_BRIDGE_EMUL_HANDLED;

	}
@@ -486,10 +486,15 @@ advk_pci_bridge_emul_pcie_conf_write(struct pci_bridge_emul *bridge, 
			advk_pcie_wait_for_retrain(pcie);

		break;



	case PCI_EXP_RTCTL:

		new = (new & PCI_EXP_RTCTL_PMEIE) << 3;

		advk_writel(pcie, new, PCIE_ISR0_MASK_REG);

	case PCI_EXP_RTCTL: {

		/* Only mask/unmask PME interrupt */

		u32 val = advk_readl(pcie, PCIE_ISR0_MASK_REG) &

			~PCIE_MSG_PM_PME_MASK;

		if ((new & PCI_EXP_RTCTL_PMEIE) == 0)

			val |= PCIE_MSG_PM_PME_MASK;

		advk_writel(pcie, val, PCIE_ISR0_MASK_REG);

		break;

	}



	case PCI_EXP_RTSTA:

		new = (new & PCI_EXP_RTSTA_PME) >> 9;