Unverified Commit c0b53f4e authored by Sai Krishna Potthuri's avatar Sai Krishna Potthuri Committed by Mark Brown
Browse files

spi: cadence-quadspi: Disable the SPI before reconfiguring 



Observed random DMA timeout failures while doing back to back
transfers which involves switching the modes from DMA to NON-DMA.
This issue is observed while testing the OSPI+UBIFS file system test case
where rootfs is mounted from OSPI UBIFS partition.
To avoid this issue, disable the SPI before changing the configuration
from external DMA to NON-DMA and vice versa and reenable it after changing
the configuration.
As per the Cadence Octal SPI design specification, it is recommended to
disable the Octal-SPI enable bit before reconfiguring.

Signed-off-by: default avatarSai Krishna Potthuri <sai.krishna.potthuri@amd.com>
Link: https://lore.kernel.org/r/20230320095931.2651714-3-sai.krishna.potthuri@amd.com


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 22c8ce0a

drivers/spi/spi-cadence-quadspi.c

+23 −15
Original line number Diff line number Diff line
@@ -791,6 +791,21 @@ static int cqspi_indirect_read_execute(struct cqspi_flash_pdata *f_pdata, 
	return ret;

}



static void cqspi_controller_enable(struct cqspi_st *cqspi, bool enable)

{

	void __iomem *reg_base = cqspi->iobase;

	unsigned int reg;



	reg = readl(reg_base + CQSPI_REG_CONFIG);



	if (enable)

		reg |= CQSPI_REG_CONFIG_ENABLE_MASK;

	else

		reg &= ~CQSPI_REG_CONFIG_ENABLE_MASK;



	writel(reg, reg_base + CQSPI_REG_CONFIG);

}



static int cqspi_versal_indirect_read_dma(struct cqspi_flash_pdata *f_pdata,

					  u_char *rxbuf, loff_t from_addr,

					  size_t n_rx)
@@ -815,10 +830,14 @@ static int cqspi_versal_indirect_read_dma(struct cqspi_flash_pdata *f_pdata, 
	if (ret)

		return ret;



	cqspi_controller_enable(cqspi, 0);



	reg = readl(cqspi->iobase + CQSPI_REG_CONFIG);

	reg |= CQSPI_REG_CONFIG_DMA_MASK;

	writel(reg, cqspi->iobase + CQSPI_REG_CONFIG);



	cqspi_controller_enable(cqspi, 1);



	dma_addr = dma_map_single(dev, rxbuf, bytes_to_dma, DMA_FROM_DEVICE);

	if (dma_mapping_error(dev, dma_addr)) {

		dev_err(dev, "dma mapping failed\n");
@@ -876,10 +895,14 @@ static int cqspi_versal_indirect_read_dma(struct cqspi_flash_pdata *f_pdata, 
	       cqspi->iobase + CQSPI_REG_INDIRECTRD);

	dma_unmap_single(dev, dma_addr, bytes_to_dma, DMA_FROM_DEVICE);



	cqspi_controller_enable(cqspi, 0);



	reg = readl(cqspi->iobase + CQSPI_REG_CONFIG);

	reg &= ~CQSPI_REG_CONFIG_DMA_MASK;

	writel(reg, cqspi->iobase + CQSPI_REG_CONFIG);



	cqspi_controller_enable(cqspi, 1);



	ret = zynqmp_pm_ospi_mux_select(cqspi->pd_dev_id,

					PM_OSPI_MUX_SEL_LINEAR);

	if (ret)
@@ -1182,21 +1205,6 @@ static void cqspi_readdata_capture(struct cqspi_st *cqspi, 
	writel(reg, reg_base + CQSPI_REG_READCAPTURE);

}



static void cqspi_controller_enable(struct cqspi_st *cqspi, bool enable)

{

	void __iomem *reg_base = cqspi->iobase;

	unsigned int reg;



	reg = readl(reg_base + CQSPI_REG_CONFIG);



	if (enable)

		reg |= CQSPI_REG_CONFIG_ENABLE_MASK;

	else

		reg &= ~CQSPI_REG_CONFIG_ENABLE_MASK;



	writel(reg, reg_base + CQSPI_REG_CONFIG);

}



static void cqspi_configure(struct cqspi_flash_pdata *f_pdata,

			    unsigned long sclk)

{