Commit c0a232f1 authored by Junhao He's avatar Junhao He Committed by Suzuki K Poulose
Browse files

coresight: trbe: Fix TRBE potential sleep in atomic context 



smp_call_function_single() will allocate an IPI interrupt vector to
the target processor and send a function call request to the interrupt
vector. After the target processor receives the IPI interrupt, it will
execute arm_trbe_remove_coresight_cpu() call request in the interrupt
handler.

According to the device_unregister() stack information, if other process
is useing the device, the down_write() may sleep, and trigger deadlocks
or unexpected errors.

  arm_trbe_remove_coresight_cpu
    coresight_unregister
      device_unregister
        device_del
          kobject_del
            __kobject_del
              sysfs_remove_dir
                kernfs_remove
                  down_write ---------> it may sleep

Add a helper arm_trbe_disable_cpu() to disable TRBE precpu irq and reset
per TRBE.
Simply call arm_trbe_remove_coresight_cpu() directly without useing the
smp_call_function_single(), which is the same as registering the TRBE
coresight device.

Fixes: 3fbf7f01 ("coresight: sink: Add TRBE driver")
Signed-off-by: default avatarJunhao He <hejunhao3@huawei.com>
Link: https://lore.kernel.org/r/20230814093813.19152-2-hejunhao3@huawei.com


[ Remove duplicate cpumask checks during removal ]
Signed-off-by: default avatarSuzuki K Poulose <suzuki.poulose@arm.com>
[ v3 - Remove the operation of assigning NULL to cpudata->drvdata ]
Signed-off-by: default avatarSuzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20230818084052.10116-1-hejunhao3@huawei.com
parent 1a9e0267

drivers/hwtracing/coresight/coresight-trbe.c

+17 −15
Original line number Diff line number Diff line
@@ -1225,6 +1225,16 @@ static void arm_trbe_enable_cpu(void *info) 
	enable_percpu_irq(drvdata->irq, IRQ_TYPE_NONE);

}



static void arm_trbe_disable_cpu(void *info)

{

	struct trbe_drvdata *drvdata = info;

	struct trbe_cpudata *cpudata = this_cpu_ptr(drvdata->cpudata);



	disable_percpu_irq(drvdata->irq);

	trbe_reset_local(cpudata);

}





static void arm_trbe_register_coresight_cpu(struct trbe_drvdata *drvdata, int cpu)

{

	struct trbe_cpudata *cpudata = per_cpu_ptr(drvdata->cpudata, cpu);
@@ -1329,18 +1339,12 @@ static void arm_trbe_probe_cpu(void *info) 
	cpumask_clear_cpu(cpu, &drvdata->supported_cpus);

}



static void arm_trbe_remove_coresight_cpu(void *info)

static void arm_trbe_remove_coresight_cpu(struct trbe_drvdata *drvdata, int cpu)

{

	int cpu = smp_processor_id();

	struct trbe_drvdata *drvdata = info;

	struct trbe_cpudata *cpudata = per_cpu_ptr(drvdata->cpudata, cpu);

	struct coresight_device *trbe_csdev = coresight_get_percpu_sink(cpu);



	disable_percpu_irq(drvdata->irq);

	trbe_reset_local(cpudata);

	if (trbe_csdev) {

		coresight_unregister(trbe_csdev);

		cpudata->drvdata = NULL;

		coresight_set_percpu_sink(cpu, NULL);

	}

}
@@ -1369,8 +1373,10 @@ static int arm_trbe_remove_coresight(struct trbe_drvdata *drvdata) 
{

	int cpu;



	for_each_cpu(cpu, &drvdata->supported_cpus)

		smp_call_function_single(cpu, arm_trbe_remove_coresight_cpu, drvdata, 1);

	for_each_cpu(cpu, &drvdata->supported_cpus) {

		smp_call_function_single(cpu, arm_trbe_disable_cpu, drvdata, 1);

		arm_trbe_remove_coresight_cpu(drvdata, cpu);

	}

	free_percpu(drvdata->cpudata);

	return 0;

}
@@ -1409,12 +1415,8 @@ static int arm_trbe_cpu_teardown(unsigned int cpu, struct hlist_node *node) 
{

	struct trbe_drvdata *drvdata = hlist_entry_safe(node, struct trbe_drvdata, hotplug_node);



	if (cpumask_test_cpu(cpu, &drvdata->supported_cpus)) {

		struct trbe_cpudata *cpudata = per_cpu_ptr(drvdata->cpudata, cpu);



		disable_percpu_irq(drvdata->irq);

		trbe_reset_local(cpudata);

	}

	if (cpumask_test_cpu(cpu, &drvdata->supported_cpus))

		arm_trbe_disable_cpu(drvdata);

	return 0;

}