Commit c07311b5 authored by Chris Wilson's avatar Chris Wilson Committed by Ingo Molnar
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perf/x86/rapl: Treat Tigerlake like Icelake 



Since Tigerlake seems to have inherited its cstates and other RAPL power
caps from Icelake, assume it also follows Icelake for its RAPL events.

Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Stephane Eranian <eranian@google.com>
Cc: Zhang Rui <rui.zhang@intel.com>
Link: https://lore.kernel.org/r/20221228113454.1199118-1-rodrigo.vivi@intel.com
parent 69b41ac8

arch/x86/events/rapl.c

+2 −0
Original line number Diff line number Diff line
@@ -800,6 +800,8 @@ static const struct x86_cpu_id rapl_model_match[] __initconst = { 
	X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_X,		&model_hsx),

	X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE_L,		&model_skl),

	X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE,		&model_skl),

	X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE_L,		&model_skl),

	X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE,		&model_skl),

	X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE,		&model_skl),

	X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L,		&model_skl),

	X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_N,		&model_skl),