Unverified Commit c05cfd71 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'imx-fixes-6.5' of... 

Merge tag 'imx-fixes-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes

i.MX fixes for 6.5:

- A couple of ARM DTS fixes for i.MX6SLL usbphy and supported CPU
  frequency of sk-imx53 board
- Add missing pull-up for imx8mn-var-som onboard PHY reset pinmux
- A couple of imx8mm-venice fixes from Tim Harvey to diable disp_blk_ctrl
- A couple of phycore-imx8mm fixes from Yashwanth Varakala to correct
  VPU label and gpio-line-names
- Fix imx8mp-blk-ctrl driver to register HSIO PLL clock as bus_power_dev
  child, so that runtime PM can translate into the necessary GPC power
  domain action

* tag 'imx-fixes-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  soc: imx: imx8mp-blk-ctrl: register HSIO PLL clock as bus_power_dev child
  ARM: dts: nxp/imx: limit sk-imx53 supported frequencies
  arm64: dts: freescale: Fix VPU G2 clock
  arm64: dts: imx8mn-var-som: add missing pull-up for onboard PHY reset pinmux
  arm64: dts: phycore-imx8mm: Correction in gpio-line-names
  arm64: dts: phycore-imx8mm: Label typo-fix of VPU
  ARM: dts: nxp/imx6sll: fix wrong property name in usbphy node
  arm64: dts: imx8mm-venice-gw7904: disable disp_blk_ctrl
  arm64: dts: imx8mm-venice-gw7903: disable disp_blk_ctrl

Link: https://lore.kernel.org/r/20230725075837.GR151430@dragon


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 09eadda2 53cab4d8

arch/arm/boot/dts/nxp/imx/imx53-sk-imx53.dts

+10 −0
Original line number Diff line number Diff line
@@ -60,6 +60,16 @@ 
	status = "okay";

};



&cpu0 {

	/* CPU rated to 800 MHz, not the default 1.2GHz. */

	operating-points = <

		/* kHz   uV */

		166666  850000

		400000  900000

		800000  1050000

	>;

};



&ecspi1 {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_ecspi1>;

arch/arm/boot/dts/nxp/imx/imx6sll.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -552,7 +552,7 @@ 
				reg = <0x020ca000 0x1000>;

				interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;

				clocks = <&clks IMX6SLL_CLK_USBPHY2>;

				phy-reg_3p0-supply = <&reg_3p0>;

				phy-3p0-supply = <&reg_3p0>;

				fsl,anatop = <&anatop>;

			};

arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-rdk.dts

+1 −1
Original line number Diff line number Diff line
@@ -141,7 +141,7 @@ 
};



&gpio1 {

	gpio-line-names = "nINT_ETHPHY", "LED_RED", "WDOG_INT", "X_RTC_INT",

	gpio-line-names = "", "LED_RED", "WDOG_INT", "X_RTC_INT",

		"", "", "", "RESET_ETHPHY",

		"CAN_nINT", "CAN_EN", "nENABLE_FLATLINK", "",

		"USB_OTG_VBUS_EN", "", "LED_GREEN", "LED_BLUE";

arch/arm64/boot/dts/freescale/imx8mm-phycore-som.dtsi

+2 −2
Original line number Diff line number Diff line
@@ -111,7 +111,7 @@ 
};



&gpio1 {

	gpio-line-names = "nINT_ETHPHY", "", "WDOG_INT", "X_RTC_INT",

	gpio-line-names = "", "", "WDOG_INT", "X_RTC_INT",

		"", "", "", "RESET_ETHPHY",

		"", "", "nENABLE_FLATLINK";

};
@@ -210,7 +210,7 @@ 
				};

			};



			reg_vdd_gpu: buck3 {

			reg_vdd_vpu: buck3 {

				regulator-always-on;

				regulator-boot-on;

				regulator-max-microvolt = <1000000>;

arch/arm64/boot/dts/freescale/imx8mm-venice-gw7903.dts

+4 −0
Original line number Diff line number Diff line
@@ -567,6 +567,10 @@ 
	status = "okay";

};



&disp_blk_ctrl {

	status = "disabled";

};



&pgc_mipi {

	status = "disabled";

};