Commit bfb44eac authored by Amber Lin's avatar Amber Lin Committed by Alex Deucher
Browse files

drm/amdkfd: Set F8_MODE for gc_v9_4_3



Set F8_MODE for GC 9.4.3 as optimal/non-IEEE. Also update gc_v9_0
to gc_v9_4_3 to include more definitions such as the F8_MODE bit, and
remove unused header files.

v2: fix IP version check (Alex)

Signed-off-by: default avatarAmber Lin <Amber.Lin@amd.com>
Reviewed-by: default avatarFelix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent db77081f
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+5 −3
Original line number Diff line number Diff line
@@ -24,9 +24,7 @@

#include "kfd_device_queue_manager.h"
#include "vega10_enum.h"
#include "gc/gc_9_0_offset.h"
#include "gc/gc_9_0_sh_mask.h"
#include "sdma0/sdma0_4_0_sh_mask.h"
#include "gc/gc_9_4_3_sh_mask.h"

static int update_qpd_v9(struct device_queue_manager *dqm,
			 struct qcm_process_device *qpd);
@@ -65,6 +63,10 @@ static int update_qpd_v9(struct device_queue_manager *dqm,
		if (dqm->dev->noretry && !dqm->dev->use_iommu_v2)
			qpd->sh_mem_config |= 1 << SH_MEM_CONFIG__RETRY_DISABLE__SHIFT;

		if (KFD_GC_VERSION(dqm->dev) == IP_VERSION(9, 4, 3))
			qpd->sh_mem_config |=
				(1 << SH_MEM_CONFIG__F8_MODE__SHIFT);

		qpd->sh_mem_ape1_limit = 0;
		qpd->sh_mem_ape1_base = 0;
	}