Unverified Commit bfa4671d authored by Dmitry Osipenko's avatar Dmitry Osipenko Committed by Mark Brown
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ASoC: tegra20: i2s: Filter out unsupported rates 



Support new nvidia,fixed-parent-rate device-tree property which instructs
I2S that board wants parent clock rate to stay at a fixed rate. This allows
to play audio over S/PDIF and I2S simultaneously. The root of the problem
is that audio components on Tegra share the same audio PLL, and thus, only
a subset of rates can be supported if we want to play audio simultaneously.
Filter out audio rates that don't match parent clock rate if device-tree
has the nvidia,fixed-parent-rate property.

Signed-off-by: default avatarDmitry Osipenko <digetx@gmail.com>
Acked-by: default avatarThierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20211204143725.31646-14-digetx@gmail.com


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 9d8f51cd

sound/soc/tegra/tegra20_i2s.c

+49 −0
Original line number Original line Diff line number Diff line
@@ -262,10 +262,59 @@ static int tegra20_i2s_probe(struct snd_soc_dai *dai) 
	return 0;

	return 0;

}

}





static const unsigned int tegra20_i2s_rates[] = {

	8000, 11025, 16000, 22050, 32000, 44100, 48000, 64000, 88200, 96000

};



static int tegra20_i2s_filter_rates(struct snd_pcm_hw_params *params,

				    struct snd_pcm_hw_rule *rule)

{

	struct snd_interval *r = hw_param_interval(params, rule->var);

	struct snd_soc_dai *dai = rule->private;

	struct tegra20_i2s *i2s = dev_get_drvdata(dai->dev);

	struct clk *parent = clk_get_parent(i2s->clk_i2s);

	long i, parent_rate, valid_rates = 0;



	parent_rate = clk_get_rate(parent);

	if (parent_rate <= 0) {

		dev_err(dai->dev, "Can't get parent clock rate: %ld\n",

			parent_rate);

		return parent_rate ?: -EINVAL;

	}



	for (i = 0; i < ARRAY_SIZE(tegra20_i2s_rates); i++) {

		if (parent_rate % (tegra20_i2s_rates[i] * 128) == 0)

			valid_rates |= BIT(i);

	}



	/*

	 * At least one rate must be valid, otherwise the parent clock isn't

	 * audio PLL. Nothing should be filtered in this case.

	 */

	if (!valid_rates)

		valid_rates = BIT(ARRAY_SIZE(tegra20_i2s_rates)) - 1;



	return snd_interval_list(r, ARRAY_SIZE(tegra20_i2s_rates),

				 tegra20_i2s_rates, valid_rates);

}



static int tegra20_i2s_startup(struct snd_pcm_substream *substream,

			       struct snd_soc_dai *dai)

{

	if (!device_property_read_bool(dai->dev, "nvidia,fixed-parent-rate"))

		return 0;



	return snd_pcm_hw_rule_add(substream->runtime, 0,

				   SNDRV_PCM_HW_PARAM_RATE,

				   tegra20_i2s_filter_rates, dai,

				   SNDRV_PCM_HW_PARAM_RATE, -1);

}



static const struct snd_soc_dai_ops tegra20_i2s_dai_ops = {

static const struct snd_soc_dai_ops tegra20_i2s_dai_ops = {

	.set_fmt	= tegra20_i2s_set_fmt,

	.set_fmt	= tegra20_i2s_set_fmt,

	.hw_params	= tegra20_i2s_hw_params,

	.hw_params	= tegra20_i2s_hw_params,

	.trigger	= tegra20_i2s_trigger,

	.trigger	= tegra20_i2s_trigger,

	.startup	= tegra20_i2s_startup,

};

};





static const struct snd_soc_dai_driver tegra20_i2s_dai_template = {

static const struct snd_soc_dai_driver tegra20_i2s_dai_template = {