Commit bf756fb8 authored by Evan Quan's avatar Evan Quan Committed by Alex Deucher
Browse files

drm/amdgpu: add missing cleanups for Polaris12 UVD/VCE on suspend 



Perform proper cleanups on UVD/VCE suspend: powergate enablement,
clockgating enablement and dpm disablement. This can fix some hangs
observed on suspending when UVD/VCE still using(e.g. issue
"pm-suspend" when video is still playing).

Signed-off-by: default avatarEvan Quan <evan.quan@amd.com>
Signed-off-by: default avatarxinhui pan <xinhui.pan@amd.com>
Reviewed-by: default avatarGuchun Chen <guchun.chen@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 2f617f4d

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

+24 −0
Original line number Diff line number Diff line
@@ -543,6 +543,30 @@ static int uvd_v6_0_hw_fini(void *handle) 
{

	struct amdgpu_device *adev = (struct amdgpu_device *)handle;



	/*

	 * Proper cleanups before halting the HW engine:

	 *   - cancel the delayed idle work

	 *   - enable powergating

	 *   - enable clockgating

	 *   - disable dpm

	 *

	 * TODO: to align with the VCN implementation, move the

	 * jobs for clockgating/powergating/dpm setting to

	 * ->set_powergating_state().

	 */

	cancel_delayed_work_sync(&adev->uvd.idle_work);



	if (adev->pm.dpm_enabled) {

		amdgpu_dpm_enable_uvd(adev, false);

	} else {

		amdgpu_asic_set_uvd_clocks(adev, 0, 0);

		/* shutdown the UVD block */

		amdgpu_device_ip_set_powergating_state(adev, AMD_IP_BLOCK_TYPE_UVD,

						       AMD_PG_STATE_GATE);

		amdgpu_device_ip_set_clockgating_state(adev, AMD_IP_BLOCK_TYPE_UVD,

						       AMD_CG_STATE_GATE);

	}



	if (RREG32(mmUVD_STATUS) != 0)

		uvd_v6_0_stop(adev);

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

+23 −0
Original line number Diff line number Diff line
@@ -490,6 +490,29 @@ static int vce_v3_0_hw_fini(void *handle) 
	int r;

	struct amdgpu_device *adev = (struct amdgpu_device *)handle;



	/*

	 * Proper cleanups before halting the HW engine:

	 *   - cancel the delayed idle work

	 *   - enable powergating

	 *   - enable clockgating

	 *   - disable dpm

	 *

	 * TODO: to align with the VCN implementation, move the

	 * jobs for clockgating/powergating/dpm setting to

	 * ->set_powergating_state().

	 */

	cancel_delayed_work_sync(&adev->vce.idle_work);



	if (adev->pm.dpm_enabled) {

		amdgpu_dpm_enable_vce(adev, false);

	} else {

		amdgpu_asic_set_vce_clocks(adev, 0, 0);

		amdgpu_device_ip_set_powergating_state(adev, AMD_IP_BLOCK_TYPE_VCE,

						       AMD_PG_STATE_GATE);

		amdgpu_device_ip_set_clockgating_state(adev, AMD_IP_BLOCK_TYPE_VCE,

						       AMD_CG_STATE_GATE);

	}



	r = vce_v3_0_wait_for_idle(handle);

	if (r)

		return r;