Commit bf2942a8 authored by Vidya Sagar's avatar Vidya Sagar Committed by Thierry Reding
Browse files

arm64: tegra: Fix Tegra194 PCIe EP compatible string 



The initialization sequence performed by the generic platform driver
pcie-designware-plat.c for a DWC based implementation doesn't work for
Tegra194. Tegra194 has a different initialization sequence requirement
which can only be satisfied by the Tegra194 specific platform driver
pcie-tegra194.c. So, remove the generic compatible string "snps,dw-pcie-ep"
from Tegra194's endpoint controller nodes.

Signed-off-by: default avatarVidya Sagar <vidyas@nvidia.com>
Reviewed-by: default avatarJon Hunter <jonathanh@nvidia.com>
Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
parent e73f0f0e

arch/arm64/boot/dts/nvidia/tegra194.dtsi

+3 −3
Original line number Diff line number Diff line
@@ -2090,7 +2090,7 @@ 
	};



	pcie_ep@14160000 {

		compatible = "nvidia,tegra194-pcie-ep", "snps,dw-pcie-ep";

		compatible = "nvidia,tegra194-pcie-ep";

		power-domains = <&bpmp TEGRA194_POWER_DOMAIN_PCIEX4A>;

		reg = <0x00 0x14160000 0x0 0x00020000>, /* appl registers (128K)      */

		      <0x00 0x36040000 0x0 0x00040000>, /* iATU_DMA reg space (256K)  */
@@ -2122,7 +2122,7 @@ 
	};



	pcie_ep@14180000 {

		compatible = "nvidia,tegra194-pcie-ep", "snps,dw-pcie-ep";

		compatible = "nvidia,tegra194-pcie-ep";

		power-domains = <&bpmp TEGRA194_POWER_DOMAIN_PCIEX8B>;

		reg = <0x00 0x14180000 0x0 0x00020000>, /* appl registers (128K)      */

		      <0x00 0x38040000 0x0 0x00040000>, /* iATU_DMA reg space (256K)  */
@@ -2154,7 +2154,7 @@ 
	};



	pcie_ep@141a0000 {

		compatible = "nvidia,tegra194-pcie-ep", "snps,dw-pcie-ep";

		compatible = "nvidia,tegra194-pcie-ep";

		power-domains = <&bpmp TEGRA194_POWER_DOMAIN_PCIEX8A>;

		reg = <0x00 0x141a0000 0x0 0x00020000>, /* appl registers (128K)      */

		      <0x00 0x3a040000 0x0 0x00040000>, /* iATU_DMA reg space (256K)  */