Commit bf1781e1 authored May 04, 2022 by Alex Deucher

drm/amdgpu: simplify nv and soc21 read_register functions



Check of the base offset for the IP exists rather than
explicitly checking for how many instances of a particular
IP there are.  This is what soc15.c already does.  Expand
this to nv.c and soc21.c.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

parent 98f56188

drivers/gpu/drm/amd/amdgpu/nv.c

+3 −3

Original line number	Diff line number	Diff line
		@@ -392,9 +392,9 @@ static int nv_read_register(struct amdgpu_device *adev, u32 se_num,
		*value = 0;
		for (i = 0; i < ARRAY_SIZE(nv_allowed_read_registers); i++) {
		en = &nv_allowed_read_registers[i];
		if ((i == 7 && (adev->sdma.num_instances == 1)) \|\| /* some asics don't have SDMA1 */
		reg_offset !=
		(adev->reg_offset[en->hwip][en->inst][en->seg] + en->reg_offset))
		if (adev->reg_offset[en->hwip][en->inst] &&
		reg_offset != (adev->reg_offset[en->hwip][en->inst][en->seg]
		+ en->reg_offset))
		continue;

		*value = nv_get_register_value(adev,

drivers/gpu/drm/amd/amdgpu/soc21.c

+3 −3

Original line number	Diff line number	Diff line
		@@ -252,9 +252,9 @@ static int soc21_read_register(struct amdgpu_device *adev, u32 se_num,
		*value = 0;
		for (i = 0; i < ARRAY_SIZE(soc21_allowed_read_registers); i++) {
		en = &soc21_allowed_read_registers[i];
		if ((i == 7 && (adev->sdma.num_instances == 1)) \|\| /* some asics don't have SDMA1 */
		reg_offset !=
		(adev->reg_offset[en->hwip][en->inst][en->seg] + en->reg_offset))
		if (adev->reg_offset[en->hwip][en->inst] &&
		reg_offset != (adev->reg_offset[en->hwip][en->inst][en->seg]
		+ en->reg_offset))
		continue;

		*value = soc21_get_register_value(adev,