Commit bef6ecca authored by Like Xu's avatar Like Xu Committed by Paolo Bonzini
Browse files

KVM: x86/pmu: Set MSR_IA32_MISC_ENABLE_EMON bit when vPMU is enabled 



On Intel platforms, the software can use the IA32_MISC_ENABLE[7] bit to
detect whether the processor supports performance monitoring facility.

It depends on the PMU is enabled for the guest, and a software write
operation to this available bit will be ignored. The proposal to ignore
the toggle in KVM is the way to go and that behavior matches bare metal.

Signed-off-by: default avatarLike Xu <likexu@tencent.com>
Message-Id: <20220411101946.20262-5-likexu@tencent.com>
Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
parent 39a4d779

arch/x86/kvm/vmx/pmu_intel.c

+1 −0
Original line number Diff line number Diff line
@@ -498,6 +498,7 @@ static void intel_pmu_refresh(struct kvm_vcpu *vcpu) 
	if (!pmu->version)

		return;



	vcpu->arch.ia32_misc_enable_msr |= MSR_IA32_MISC_ENABLE_EMON;

	perf_get_x86_pmu_capability(&x86_pmu);



	pmu->nr_arch_gp_counters = min_t(int, eax.split.num_counters,

arch/x86/kvm/x86.c

+13 −2
Original line number Diff line number Diff line
@@ -3558,9 +3558,19 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info) 
			vcpu->arch.ia32_tsc_adjust_msr = data;

		}

		break;

	case MSR_IA32_MISC_ENABLE:

	case MSR_IA32_MISC_ENABLE: {

		u64 old_val = vcpu->arch.ia32_misc_enable_msr;

		u64 pmu_mask = MSR_IA32_MISC_ENABLE_EMON;



		/*

		 * For a dummy user space, the order of setting vPMU capabilities and

		 * initialising MSR_IA32_MISC_ENABLE is not strictly guaranteed, so to

		 * avoid inconsistent functionality we keep the vPMU bits unchanged here.

		 */

		data &= ~pmu_mask;

		data |= old_val & pmu_mask;

		if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT) &&

		    ((vcpu->arch.ia32_misc_enable_msr ^ data) & MSR_IA32_MISC_ENABLE_MWAIT)) {

		    ((old_val ^ data)  & MSR_IA32_MISC_ENABLE_MWAIT)) {

			if (!guest_cpuid_has(vcpu, X86_FEATURE_XMM3))

				return 1;

			vcpu->arch.ia32_misc_enable_msr = data;
@@ -3569,6 +3579,7 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info) 
			vcpu->arch.ia32_misc_enable_msr = data;

		}

		break;

	}

	case MSR_IA32_SMBASE:

		if (!msr_info->host_initiated)

			return 1;