Commit bedd1738 authored by Zhengjun Xing's avatar Zhengjun Xing Committed by Arnaldo Carvalho de Melo
Browse files

perf vendor events intel: Update event list for haswellx 

Update JSON core/uncore events for haswellx to perf.

Based on HSX JSON list v24:

https://download.01.org/perfmon/HSX



Reviewed-by: default avatarKan Liang <kan.liang@linux.intel.com>
Signed-off-by: default avatarXing Zhengjun <zhengjun.xing@linux.intel.com>
Cc: Alexander Shishkin <alexander.shishkin@intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Ian Rogers <irogers@google.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Link: https://lore.kernel.org/r/20220614145019.2177071-2-zhengjun.xing@linux.intel.com


Signed-off-by: default avatarArnaldo Carvalho de Melo <acme@redhat.com>
parent 28738de9

tools/perf/pmu-events/arch/x86/haswellx/cache.json

+9 −28
Original line number Diff line number Diff line
@@ -832,9 +832,8 @@ 
        "EventCode": "0xB7, 0xBB",

        "EventName": "OFFCORE_RESPONSE.ALL_CODE_RD.LLC_HIT.HIT_OTHER_CORE_NO_FWD",

        "MSRIndex": "0x1a6,0x1a7",

        "MSRValue": "0x04003C0244",

        "MSRValue": "0x4003C0244",

        "Offcore": "1",

        "PublicDescription": "Counts all demand & prefetch code reads hit in the L3 and the snoops to sibling cores hit in either E/S state and the line is not forwarded",

        "SampleAfterValue": "100003",

        "UMask": "0x1"

    },
@@ -847,7 +846,6 @@ 
        "MSRIndex": "0x1a6,0x1a7",

        "MSRValue": "0x10003C0091",

        "Offcore": "1",

        "PublicDescription": "Counts all demand & prefetch data reads hit in the L3 and the snoop to one of the sibling cores hits the line in M state and the line is forwarded",

        "SampleAfterValue": "100003",

        "UMask": "0x1"

    },
@@ -858,9 +856,8 @@ 
        "EventCode": "0xB7, 0xBB",

        "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.LLC_HIT.HIT_OTHER_CORE_NO_FWD",

        "MSRIndex": "0x1a6,0x1a7",

        "MSRValue": "0x04003C0091",

        "MSRValue": "0x4003C0091",

        "Offcore": "1",

        "PublicDescription": "Counts all demand & prefetch data reads hit in the L3 and the snoops to sibling cores hit in either E/S state and the line is not forwarded",

        "SampleAfterValue": "100003",

        "UMask": "0x1"

    },
@@ -873,7 +870,6 @@ 
        "MSRIndex": "0x1a6,0x1a7",

        "MSRValue": "0x10003C07F7",

        "Offcore": "1",

        "PublicDescription": "Counts all data/code/rfo reads (demand & prefetch) hit in the L3 and the snoop to one of the sibling cores hits the line in M state and the line is forwarded",

        "SampleAfterValue": "100003",

        "UMask": "0x1"

    },
@@ -884,9 +880,8 @@ 
        "EventCode": "0xB7, 0xBB",

        "EventName": "OFFCORE_RESPONSE.ALL_READS.LLC_HIT.HIT_OTHER_CORE_NO_FWD",

        "MSRIndex": "0x1a6,0x1a7",

        "MSRValue": "0x04003C07F7",

        "MSRValue": "0x4003C07F7",

        "Offcore": "1",

        "PublicDescription": "Counts all data/code/rfo reads (demand & prefetch) hit in the L3 and the snoops to sibling cores hit in either E/S state and the line is not forwarded",

        "SampleAfterValue": "100003",

        "UMask": "0x1"

    },
@@ -899,7 +894,6 @@ 
        "MSRIndex": "0x1a6,0x1a7",

        "MSRValue": "0x3F803C8FFF",

        "Offcore": "1",

        "PublicDescription": "Counts all requests hit in the L3",

        "SampleAfterValue": "100003",

        "UMask": "0x1"

    },
@@ -912,7 +906,6 @@ 
        "MSRIndex": "0x1a6,0x1a7",

        "MSRValue": "0x10003C0122",

        "Offcore": "1",

        "PublicDescription": "Counts all demand & prefetch RFOs hit in the L3 and the snoop to one of the sibling cores hits the line in M state and the line is forwarded",

        "SampleAfterValue": "100003",

        "UMask": "0x1"

    },
@@ -923,9 +916,8 @@ 
        "EventCode": "0xB7, 0xBB",

        "EventName": "OFFCORE_RESPONSE.ALL_RFO.LLC_HIT.HIT_OTHER_CORE_NO_FWD",

        "MSRIndex": "0x1a6,0x1a7",

        "MSRValue": "0x04003C0122",

        "MSRValue": "0x4003C0122",

        "Offcore": "1",

        "PublicDescription": "Counts all demand & prefetch RFOs hit in the L3 and the snoops to sibling cores hit in either E/S state and the line is not forwarded",

        "SampleAfterValue": "100003",

        "UMask": "0x1"

    },
@@ -938,7 +930,6 @@ 
        "MSRIndex": "0x1a6,0x1a7",

        "MSRValue": "0x10003C0004",

        "Offcore": "1",

        "PublicDescription": "Counts all demand code reads hit in the L3 and the snoop to one of the sibling cores hits the line in M state and the line is forwarded",

        "SampleAfterValue": "100003",

        "UMask": "0x1"

    },
@@ -949,9 +940,8 @@ 
        "EventCode": "0xB7, 0xBB",

        "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.LLC_HIT.HIT_OTHER_CORE_NO_FWD",

        "MSRIndex": "0x1a6,0x1a7",

        "MSRValue": "0x04003C0004",

        "MSRValue": "0x4003C0004",

        "Offcore": "1",

        "PublicDescription": "Counts all demand code reads hit in the L3 and the snoops to sibling cores hit in either E/S state and the line is not forwarded",

        "SampleAfterValue": "100003",

        "UMask": "0x1"

    },
@@ -964,7 +954,6 @@ 
        "MSRIndex": "0x1a6,0x1a7",

        "MSRValue": "0x10003C0001",

        "Offcore": "1",

        "PublicDescription": "Counts demand data reads hit in the L3 and the snoop to one of the sibling cores hits the line in M state and the line is forwarded",

        "SampleAfterValue": "100003",

        "UMask": "0x1"

    },
@@ -975,9 +964,8 @@ 
        "EventCode": "0xB7, 0xBB",

        "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.LLC_HIT.HIT_OTHER_CORE_NO_FWD",

        "MSRIndex": "0x1a6,0x1a7",

        "MSRValue": "0x04003C0001",

        "MSRValue": "0x4003C0001",

        "Offcore": "1",

        "PublicDescription": "Counts demand data reads hit in the L3 and the snoops to sibling cores hit in either E/S state and the line is not forwarded",

        "SampleAfterValue": "100003",

        "UMask": "0x1"

    },
@@ -990,7 +978,6 @@ 
        "MSRIndex": "0x1a6,0x1a7",

        "MSRValue": "0x10003C0002",

        "Offcore": "1",

        "PublicDescription": "Counts all demand data writes (RFOs) hit in the L3 and the snoop to one of the sibling cores hits the line in M state and the line is forwarded",

        "SampleAfterValue": "100003",

        "UMask": "0x1"

    },
@@ -1001,9 +988,8 @@ 
        "EventCode": "0xB7, 0xBB",

        "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.LLC_HIT.HIT_OTHER_CORE_NO_FWD",

        "MSRIndex": "0x1a6,0x1a7",

        "MSRValue": "0x04003C0002",

        "MSRValue": "0x4003C0002",

        "Offcore": "1",

        "PublicDescription": "Counts all demand data writes (RFOs) hit in the L3 and the snoops to sibling cores hit in either E/S state and the line is not forwarded",

        "SampleAfterValue": "100003",

        "UMask": "0x1"

    },
@@ -1016,7 +1002,6 @@ 
        "MSRIndex": "0x1a6,0x1a7",

        "MSRValue": "0x3F803C0040",

        "Offcore": "1",

        "PublicDescription": "Counts all prefetch (that bring data to LLC only) code reads hit in the L3",

        "SampleAfterValue": "100003",

        "UMask": "0x1"

    },
@@ -1029,7 +1014,6 @@ 
        "MSRIndex": "0x1a6,0x1a7",

        "MSRValue": "0x3F803C0010",

        "Offcore": "1",

        "PublicDescription": "Counts prefetch (that bring data to L2) data reads hit in the L3",

        "SampleAfterValue": "100003",

        "UMask": "0x1"

    },
@@ -1042,7 +1026,6 @@ 
        "MSRIndex": "0x1a6,0x1a7",

        "MSRValue": "0x3F803C0020",

        "Offcore": "1",

        "PublicDescription": "Counts all prefetch (that bring data to L2) RFOs hit in the L3",

        "SampleAfterValue": "100003",

        "UMask": "0x1"

    },
@@ -1055,7 +1038,6 @@ 
        "MSRIndex": "0x1a6,0x1a7",

        "MSRValue": "0x3F803C0200",

        "Offcore": "1",

        "PublicDescription": "Counts prefetch (that bring data to LLC only) code reads hit in the L3",

        "SampleAfterValue": "100003",

        "UMask": "0x1"

    },
@@ -1068,7 +1050,6 @@ 
        "MSRIndex": "0x1a6,0x1a7",

        "MSRValue": "0x3F803C0080",

        "Offcore": "1",

        "PublicDescription": "Counts all prefetch (that bring data to LLC only) data reads hit in the L3",

        "SampleAfterValue": "100003",

        "UMask": "0x1"

    },
@@ -1081,7 +1062,6 @@ 
        "MSRIndex": "0x1a6,0x1a7",

        "MSRValue": "0x3F803C0100",

        "Offcore": "1",

        "PublicDescription": "Counts all prefetch (that bring data to LLC only) RFOs hit in the L3",

        "SampleAfterValue": "100003",

        "UMask": "0x1"

    },
@@ -1091,6 +1071,7 @@ 
        "CounterHTOff": "0,1,2,3,4,5,6,7",

        "EventCode": "0xf4",

        "EventName": "SQ_MISC.SPLIT_LOCK",

        "PublicDescription": "SQ_MISC.SPLIT_LOCK",

        "SampleAfterValue": "100003",

        "UMask": "0x10"

    }

tools/perf/pmu-events/arch/x86/haswellx/memory.json

+12 −40
Original line number Diff line number Diff line
@@ -233,7 +233,6 @@ 
        "MSRIndex": "0x1a6,0x1a7",

        "MSRValue": "0x3FBFC00244",

        "Offcore": "1",

        "PublicDescription": "Counts all demand & prefetch code reads miss in the L3",

        "SampleAfterValue": "100003",

        "UMask": "0x1"

    },
@@ -244,9 +243,8 @@ 
        "EventCode": "0xB7, 0xBB",

        "EventName": "OFFCORE_RESPONSE.ALL_CODE_RD.LLC_MISS.LOCAL_DRAM",

        "MSRIndex": "0x1a6,0x1a7",

        "MSRValue": "0x0600400244",

        "MSRValue": "0x600400244",

        "Offcore": "1",

        "PublicDescription": "Counts all demand & prefetch code reads miss the L3 and the data is returned from local dram",

        "SampleAfterValue": "100003",

        "UMask": "0x1"

    },
@@ -259,7 +257,6 @@ 
        "MSRIndex": "0x1a6,0x1a7",

        "MSRValue": "0x3FBFC00091",

        "Offcore": "1",

        "PublicDescription": "Counts all demand & prefetch data reads miss in the L3",

        "SampleAfterValue": "100003",

        "UMask": "0x1"

    },
@@ -270,9 +267,8 @@ 
        "EventCode": "0xB7, 0xBB",

        "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.LLC_MISS.LOCAL_DRAM",

        "MSRIndex": "0x1a6,0x1a7",

        "MSRValue": "0x0600400091",

        "MSRValue": "0x600400091",

        "Offcore": "1",

        "PublicDescription": "Counts all demand & prefetch data reads miss the L3 and the data is returned from local dram",

        "SampleAfterValue": "100003",

        "UMask": "0x1"

    },
@@ -283,9 +279,8 @@ 
        "EventCode": "0xB7, 0xBB",

        "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.LLC_MISS.REMOTE_DRAM",

        "MSRIndex": "0x1a6,0x1a7",

        "MSRValue": "0x063F800091",

        "MSRValue": "0x63F800091",

        "Offcore": "1",

        "PublicDescription": "Counts all demand & prefetch data reads miss the L3 and the data is returned from remote dram",

        "SampleAfterValue": "100003",

        "UMask": "0x1"

    },
@@ -298,7 +293,6 @@ 
        "MSRIndex": "0x1a6,0x1a7",

        "MSRValue": "0x103FC00091",

        "Offcore": "1",

        "PublicDescription": "Counts all demand & prefetch data reads miss the L3 and the modified data is transferred from remote cache",

        "SampleAfterValue": "100003",

        "UMask": "0x1"

    },
@@ -309,9 +303,8 @@ 
        "EventCode": "0xB7, 0xBB",

        "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.LLC_MISS.REMOTE_HIT_FORWARD",

        "MSRIndex": "0x1a6,0x1a7",

        "MSRValue": "0x083FC00091",

        "MSRValue": "0x83FC00091",

        "Offcore": "1",

        "PublicDescription": "Counts all demand & prefetch data reads miss the L3 and clean or shared data is transferred from remote cache",

        "SampleAfterValue": "100003",

        "UMask": "0x1"

    },
@@ -324,7 +317,6 @@ 
        "MSRIndex": "0x1a6,0x1a7",

        "MSRValue": "0x3FBFC007F7",

        "Offcore": "1",

        "PublicDescription": "Counts all data/code/rfo reads (demand & prefetch) miss in the L3",

        "SampleAfterValue": "100003",

        "UMask": "0x1"

    },
@@ -335,9 +327,8 @@ 
        "EventCode": "0xB7, 0xBB",

        "EventName": "OFFCORE_RESPONSE.ALL_READS.LLC_MISS.LOCAL_DRAM",

        "MSRIndex": "0x1a6,0x1a7",

        "MSRValue": "0x06004007F7",

        "MSRValue": "0x6004007F7",

        "Offcore": "1",

        "PublicDescription": "Counts all data/code/rfo reads (demand & prefetch) miss the L3 and the data is returned from local dram",

        "SampleAfterValue": "100003",

        "UMask": "0x1"

    },
@@ -348,9 +339,8 @@ 
        "EventCode": "0xB7, 0xBB",

        "EventName": "OFFCORE_RESPONSE.ALL_READS.LLC_MISS.REMOTE_DRAM",

        "MSRIndex": "0x1a6,0x1a7",

        "MSRValue": "0x063F8007F7",

        "MSRValue": "0x63F8007F7",

        "Offcore": "1",

        "PublicDescription": "Counts all data/code/rfo reads (demand & prefetch) miss the L3 and the data is returned from remote dram",

        "SampleAfterValue": "100003",

        "UMask": "0x1"

    },
@@ -363,7 +353,6 @@ 
        "MSRIndex": "0x1a6,0x1a7",

        "MSRValue": "0x103FC007F7",

        "Offcore": "1",

        "PublicDescription": "Counts all data/code/rfo reads (demand & prefetch) miss the L3 and the modified data is transferred from remote cache",

        "SampleAfterValue": "100003",

        "UMask": "0x1"

    },
@@ -374,9 +363,8 @@ 
        "EventCode": "0xB7, 0xBB",

        "EventName": "OFFCORE_RESPONSE.ALL_READS.LLC_MISS.REMOTE_HIT_FORWARD",

        "MSRIndex": "0x1a6,0x1a7",

        "MSRValue": "0x083FC007F7",

        "MSRValue": "0x83FC007F7",

        "Offcore": "1",

        "PublicDescription": "Counts all data/code/rfo reads (demand & prefetch) miss the L3 and clean or shared data is transferred from remote cache",

        "SampleAfterValue": "100003",

        "UMask": "0x1"

    },
@@ -389,7 +377,6 @@ 
        "MSRIndex": "0x1a6,0x1a7",

        "MSRValue": "0x3FBFC08FFF",

        "Offcore": "1",

        "PublicDescription": "Counts all requests miss in the L3",

        "SampleAfterValue": "100003",

        "UMask": "0x1"

    },
@@ -402,7 +389,6 @@ 
        "MSRIndex": "0x1a6,0x1a7",

        "MSRValue": "0x3FBFC00122",

        "Offcore": "1",

        "PublicDescription": "Counts all demand & prefetch RFOs miss in the L3",

        "SampleAfterValue": "100003",

        "UMask": "0x1"

    },
@@ -413,9 +399,8 @@ 
        "EventCode": "0xB7, 0xBB",

        "EventName": "OFFCORE_RESPONSE.ALL_RFO.LLC_MISS.LOCAL_DRAM",

        "MSRIndex": "0x1a6,0x1a7",

        "MSRValue": "0x0600400122",

        "MSRValue": "0x600400122",

        "Offcore": "1",

        "PublicDescription": "Counts all demand & prefetch RFOs miss the L3 and the data is returned from local dram",

        "SampleAfterValue": "100003",

        "UMask": "0x1"

    },
@@ -428,7 +413,6 @@ 
        "MSRIndex": "0x1a6,0x1a7",

        "MSRValue": "0x3FBFC00004",

        "Offcore": "1",

        "PublicDescription": "Counts all demand code reads miss in the L3",

        "SampleAfterValue": "100003",

        "UMask": "0x1"

    },
@@ -439,9 +423,8 @@ 
        "EventCode": "0xB7, 0xBB",

        "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.LLC_MISS.LOCAL_DRAM",

        "MSRIndex": "0x1a6,0x1a7",

        "MSRValue": "0x0600400004",

        "MSRValue": "0x600400004",

        "Offcore": "1",

        "PublicDescription": "Counts all demand code reads miss the L3 and the data is returned from local dram",

        "SampleAfterValue": "100003",

        "UMask": "0x1"

    },
@@ -454,7 +437,6 @@ 
        "MSRIndex": "0x1a6,0x1a7",

        "MSRValue": "0x3FBFC00001",

        "Offcore": "1",

        "PublicDescription": "Counts demand data reads miss in the L3",

        "SampleAfterValue": "100003",

        "UMask": "0x1"

    },
@@ -465,9 +447,8 @@ 
        "EventCode": "0xB7, 0xBB",

        "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.LLC_MISS.LOCAL_DRAM",

        "MSRIndex": "0x1a6,0x1a7",

        "MSRValue": "0x0600400001",

        "MSRValue": "0x600400001",

        "Offcore": "1",

        "PublicDescription": "Counts demand data reads miss the L3 and the data is returned from local dram",

        "SampleAfterValue": "100003",

        "UMask": "0x1"

    },
@@ -480,7 +461,6 @@ 
        "MSRIndex": "0x1a6,0x1a7",

        "MSRValue": "0x3FBFC00002",

        "Offcore": "1",

        "PublicDescription": "Counts all demand data writes (RFOs) miss in the L3",

        "SampleAfterValue": "100003",

        "UMask": "0x1"

    },
@@ -491,9 +471,8 @@ 
        "EventCode": "0xB7, 0xBB",

        "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.LLC_MISS.LOCAL_DRAM",

        "MSRIndex": "0x1a6,0x1a7",

        "MSRValue": "0x0600400002",

        "MSRValue": "0x600400002",

        "Offcore": "1",

        "PublicDescription": "Counts all demand data writes (RFOs) miss the L3 and the data is returned from local dram",

        "SampleAfterValue": "100003",

        "UMask": "0x1"

    },
@@ -506,7 +485,6 @@ 
        "MSRIndex": "0x1a6,0x1a7",

        "MSRValue": "0x103FC00002",

        "Offcore": "1",

        "PublicDescription": "Counts all demand data writes (RFOs) miss the L3 and the modified data is transferred from remote cache",

        "SampleAfterValue": "100003",

        "UMask": "0x1"

    },
@@ -519,7 +497,6 @@ 
        "MSRIndex": "0x1a6,0x1a7",

        "MSRValue": "0x3FBFC00040",

        "Offcore": "1",

        "PublicDescription": "Counts all prefetch (that bring data to LLC only) code reads miss in the L3",

        "SampleAfterValue": "100003",

        "UMask": "0x1"

    },
@@ -532,7 +509,6 @@ 
        "MSRIndex": "0x1a6,0x1a7",

        "MSRValue": "0x3FBFC00010",

        "Offcore": "1",

        "PublicDescription": "Counts prefetch (that bring data to L2) data reads miss in the L3",

        "SampleAfterValue": "100003",

        "UMask": "0x1"

    },
@@ -545,7 +521,6 @@ 
        "MSRIndex": "0x1a6,0x1a7",

        "MSRValue": "0x3FBFC00020",

        "Offcore": "1",

        "PublicDescription": "Counts all prefetch (that bring data to L2) RFOs miss in the L3",

        "SampleAfterValue": "100003",

        "UMask": "0x1"

    },
@@ -558,7 +533,6 @@ 
        "MSRIndex": "0x1a6,0x1a7",

        "MSRValue": "0x3FBFC00200",

        "Offcore": "1",

        "PublicDescription": "Counts prefetch (that bring data to LLC only) code reads miss in the L3",

        "SampleAfterValue": "100003",

        "UMask": "0x1"

    },
@@ -571,7 +545,6 @@ 
        "MSRIndex": "0x1a6,0x1a7",

        "MSRValue": "0x3FBFC00080",

        "Offcore": "1",

        "PublicDescription": "Counts all prefetch (that bring data to LLC only) data reads miss in the L3",

        "SampleAfterValue": "100003",

        "UMask": "0x1"

    },
@@ -584,7 +557,6 @@ 
        "MSRIndex": "0x1a6,0x1a7",

        "MSRValue": "0x3FBFC00100",

        "Offcore": "1",

        "PublicDescription": "Counts all prefetch (that bring data to LLC only) RFOs miss in the L3",

        "SampleAfterValue": "100003",

        "UMask": "0x1"

    },

tools/perf/pmu-events/arch/x86/haswellx/pipeline.json

+2 −2
Original line number Diff line number Diff line
@@ -1295,7 +1295,7 @@ 
        "BriefDescription": "Cycles with less than 10 actually retired uops.",

        "Counter": "0,1,2,3",

        "CounterHTOff": "0,1,2,3",

        "CounterMask": "10",

        "CounterMask": "16",

        "EventCode": "0xC2",

        "EventName": "UOPS_RETIRED.TOTAL_CYCLES",

        "Invert": "1",

tools/perf/pmu-events/arch/x86/haswellx/uncore-cache.json

+3628 −151

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tools/perf/pmu-events/arch/x86/haswellx/uncore-interconnect.json

+1428 −2

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