Commit bed42f13 authored by Yan Zhao's avatar Yan Zhao Committed by Zhenyu Wang
Browse files

drm/i915/gvt: introduce a new flag F_CMD_WRITE_PATCH



F_CMD_WRITE_PATCH means command write to this register needs to be patched

Cc: Kevin Tian <kevin.tian@intel.com>
Signed-off-by: default avatarYan Zhao <yan.y.zhao@intel.com>
Signed-off-by: default avatarZhenyu Wang <zhenyuw@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20201223034553.17272-1-yan.y.zhao@intel.com


Reviewed-by: default avatarZhenyu Wang <zhenyuw@linux.intel.com>
parent 1a881193
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+31 −0
Original line number Diff line number Diff line
@@ -261,6 +261,8 @@ struct intel_gvt_mmio {
 * logical context image
 */
#define F_SR_IN_CTX	(1 << 7)
/* Value of command write of this reg needs to be patched */
#define F_CMD_WRITE_PATCH	(1 << 8)

	struct gvt_mmio_block *mmio_block;
	unsigned int num_mmio_block;
@@ -685,6 +687,35 @@ static inline void intel_gvt_mmio_set_sr_in_ctx(
}

void intel_gvt_debugfs_add_vgpu(struct intel_vgpu *vgpu);
/**
 * intel_gvt_mmio_set_cmd_write_patch -
 *				mark an MMIO if its cmd write needs to be
 *				patched
 * @gvt: a GVT device
 * @offset: register offset
 *
 */
static inline void intel_gvt_mmio_set_cmd_write_patch(
			struct intel_gvt *gvt, unsigned int offset)
{
	gvt->mmio.mmio_attribute[offset >> 2] |= F_CMD_WRITE_PATCH;
}

/**
 * intel_gvt_mmio_is_cmd_write_patch - check if an mmio's cmd access needs to
 * be patched
 * @gvt: a GVT device
 * @offset: register offset
 *
 * Returns:
 * True if GPU commmand write to an MMIO should be patched
 */
static inline bool intel_gvt_mmio_is_cmd_write_patch(
			struct intel_gvt *gvt, unsigned int offset)
{
	return gvt->mmio.mmio_attribute[offset >> 2] & F_CMD_WRITE_PATCH;
}

void intel_gvt_debugfs_remove_vgpu(struct intel_vgpu *vgpu);
void intel_gvt_debugfs_init(struct intel_gvt *gvt);
void intel_gvt_debugfs_clean(struct intel_gvt *gvt);