Commit be9439df authored by Taniya Das's avatar Taniya Das Committed by Bjorn Andersson
Browse files

dt-bindings: clock: Add resets for LPASS audio clock controller for SC7280



Add support for LPASS audio clock gating for RX/TX/SWA core bus clocks
for SC7280. Update reg property min/max items in YAML schema.

Fixes: 4185b27b ("dt-bindings: clock: Add YAML schemas for LPASS clocks on SC7280")
Acked-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarTaniya Das <quic_tdas@quicinc.com>
Reviewed-by: default avatarStephen Boyd <sboyd@kernel.org>
Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/1662005846-4838-4-git-send-email-quic_c_skakit@quicinc.com
parent 7afdf3af
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+16 −3
Original line number Diff line number Diff line
@@ -22,6 +22,8 @@ properties:

  clock-names: true

  reg: true

  compatible:
    enum:
      - qcom,sc7280-lpassaoncc
@@ -38,8 +40,8 @@ properties:
  '#power-domain-cells':
    const: 1

  reg:
    maxItems: 1
  '#reset-cells':
    const: 1

  qcom,adsp-pil-mode:
    description:
@@ -75,6 +77,11 @@ allOf:
          items:
            - const: bi_tcxo
            - const: lpass_aon_cc_main_rcg_clk_src

        reg:
          items:
            - description: lpass core cc register
            - description: lpass audio csr register
  - if:
      properties:
        compatible:
@@ -96,6 +103,8 @@ allOf:
            - const: bi_tcxo_ao
            - const: iface

        reg:
          maxItems: 1
  - if:
      properties:
        compatible:
@@ -114,6 +123,8 @@ allOf:
          items:
            - const: bi_tcxo

        reg:
          maxItems: 1
examples:
  - |
    #include <dt-bindings/clock/qcom,rpmh.h>
@@ -122,13 +133,15 @@ examples:
    #include <dt-bindings/clock/qcom,lpasscorecc-sc7280.h>
    lpass_audiocc: clock-controller@3300000 {
      compatible = "qcom,sc7280-lpassaudiocc";
      reg = <0x3300000 0x30000>;
      reg = <0x3300000 0x30000>,
            <0x32a9000 0x1000>;
      clocks = <&rpmhcc RPMH_CXO_CLK>,
               <&lpass_aon LPASS_AON_CC_MAIN_RCG_CLK_SRC>;
      clock-names = "bi_tcxo", "lpass_aon_cc_main_rcg_clk_src";
      power-domains = <&lpass_aon LPASS_AON_CC_LPASS_AUDIO_HM_GDSC>;
      #clock-cells = <1>;
      #power-domain-cells = <1>;
      #reset-cells = <1>;
    };

  - |
+5 −0
Original line number Diff line number Diff line
@@ -24,6 +24,11 @@
#define LPASS_AUDIO_CC_RX_MCLK_CLK			14
#define LPASS_AUDIO_CC_RX_MCLK_CLK_SRC			15

/* LPASS AUDIO CC CSR */
#define LPASS_AUDIO_SWR_RX_CGCR				0
#define LPASS_AUDIO_SWR_TX_CGCR				1
#define LPASS_AUDIO_SWR_WSA_CGCR			2

/* LPASS_AON_CC clocks */
#define LPASS_AON_CC_PLL				0
#define LPASS_AON_CC_PLL_OUT_EVEN			1