Commit be74872a authored by James Morse's avatar James Morse Committed by Zeng Heng
Browse files

arm_mpam: Allow configuration to be applied and restored during cpu online 

maillist inclusion
category: feature
bugzilla: https://gitee.com/openeuler/kernel/issues/I8T2RT

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/morse/linux.git/log/?h=mpam/snapshot/v6.7-rc2



---------------------------

When CPUs come online the original configuration should be restored.
Once the maximum partid is known, allocate an configuration array for
each component, and reprogram each RIS configuration from this.

The MPAM spec describes how multiple controls can interact. To prevent
this happening by accident, always reset controls that don't have a
valid configuration. This allows the same helper to be used for
configuration and reset.

Signed-off-by: default avatarJames Morse <james.morse@arm.com>
Signed-off-by: default avatarZeng Heng <zengheng4@huawei.com>
parent 39e81615

drivers/platform/mpam/mpam_devices.c

+173 −20
Original line number Original line Diff line number Diff line
@@ -699,51 +699,89 @@ static void mpam_reset_msc_bitmap(struct mpam_msc *msc, u16 reg, u16 wd) 
		__mpam_write_reg(msc, reg, bm);

		__mpam_write_reg(msc, reg, bm);

}

}





static void mpam_reset_ris_partid(struct mpam_msc_ris *ris, u16 partid)

static void mpam_reprogram_ris_partid(struct mpam_msc_ris *ris, u16 partid,

				      struct mpam_config *cfg)

{

{

	struct mpam_msc *msc = ris->msc;

	struct mpam_msc *msc = ris->msc;

	u16 bwa_fract = MPAMCFG_MBW_MAX_MAX;

	u16 bwa_fract = MPAMCFG_MBW_MAX_MAX;

	struct mpam_props *rprops = &ris->props;

	struct mpam_props *rprops = &ris->props;





	lockdep_assert_held(&msc->lock);



	spin_lock(&msc->part_sel_lock);

	spin_lock(&msc->part_sel_lock);

	__mpam_part_sel(ris->ris_idx, partid, msc);

	__mpam_part_sel(ris->ris_idx, partid, msc);





	if (mpam_has_feature(mpam_feat_cpor_part, rprops))

	if (mpam_has_feature(mpam_feat_cpor_part, rprops)) {

		mpam_reset_msc_bitmap(msc, MPAMCFG_CPBM, rprops->cpbm_wd);

		if (mpam_has_feature(mpam_feat_cpor_part, cfg))

			mpam_write_partsel_reg(msc, CPBM, cfg->cpbm);

		else

			mpam_reset_msc_bitmap(msc, MPAMCFG_CPBM,

					      rprops->cpbm_wd);

	}





	if (mpam_has_feature(mpam_feat_mbw_part, rprops))

	if (mpam_has_feature(mpam_feat_mbw_part, rprops)) {

		mpam_reset_msc_bitmap(msc, MPAMCFG_MBW_PBM, rprops->mbw_pbm_bits);

		if (mpam_has_feature(mpam_feat_mbw_part, cfg))

			mpam_write_partsel_reg(msc, MBW_PBM, cfg->mbw_pbm);

		else

			mpam_reset_msc_bitmap(msc, MPAMCFG_MBW_PBM,

					      rprops->mbw_pbm_bits);

	}





	if (mpam_has_feature(mpam_feat_mbw_min, rprops))

	if (mpam_has_feature(mpam_feat_mbw_min, rprops))

		mpam_write_partsel_reg(msc, MBW_MIN, 0);

		mpam_write_partsel_reg(msc, MBW_MIN, 0);





	if (mpam_has_feature(mpam_feat_mbw_max, rprops))

	if (mpam_has_feature(mpam_feat_mbw_max, rprops)) {

		if (mpam_has_feature(mpam_feat_mbw_max, cfg))

			mpam_write_partsel_reg(msc, MBW_MAX, cfg->mbw_max);

		else

			mpam_write_partsel_reg(msc, MBW_MAX, bwa_fract);

			mpam_write_partsel_reg(msc, MBW_MAX, bwa_fract);

	}





	if (mpam_has_feature(mpam_feat_mbw_prop, rprops))

	if (mpam_has_feature(mpam_feat_mbw_prop, rprops))

		mpam_write_partsel_reg(msc, MBW_PROP, bwa_fract);

		mpam_write_partsel_reg(msc, MBW_PROP, bwa_fract);

	spin_unlock(&msc->part_sel_lock);

	spin_unlock(&msc->part_sel_lock);

}

}





struct reprogram_ris {

	struct mpam_msc_ris *ris;

	struct mpam_config *cfg;

};



/* Call with MSC lock held */

static int mpam_reprogram_ris(void *_arg)

{

	u16 partid, partid_max;

	struct reprogram_ris *arg = _arg;

	struct mpam_msc_ris *ris = arg->ris;

	struct mpam_config *cfg = arg->cfg;



	if (ris->in_reset_state)

		return 0;



	spin_lock(&partid_max_lock);

	partid_max = mpam_partid_max;

	spin_unlock(&partid_max_lock);

	for (partid = 0; partid < partid_max; partid++)

		mpam_reprogram_ris_partid(ris, partid, cfg);



	return 0;

}



/*

/*

 * Called via smp_call_on_cpu() to prevent migration, while still being

 * Called via smp_call_on_cpu() to prevent migration, while still being

 * pre-emptible.

 * pre-emptible.

 */

 */

static int mpam_reset_ris(void *arg)

static int mpam_reset_ris(void *arg)

{

{

	u16 partid, partid_max;

	struct mpam_msc_ris *ris = arg;

	struct mpam_msc_ris *ris = arg;

	struct reprogram_ris reprogram_arg;

	struct mpam_config empty_cfg = { 0 };





	if (ris->in_reset_state)

	if (ris->in_reset_state)

		return 0;

		return 0;





	spin_lock(&partid_max_lock);

	reprogram_arg.ris = ris;

	partid_max = mpam_partid_max;

	reprogram_arg.cfg = &empty_cfg;

	spin_unlock(&partid_max_lock);



	for (partid = 0; partid < partid_max; partid++)

	mpam_reprogram_ris(&reprogram_arg);

		mpam_reset_ris_partid(ris, partid);





	return 0;

	return 0;

}

}
@@ -792,6 +830,37 @@ static void mpam_reset_msc(struct mpam_msc *msc, bool online) 
	srcu_read_unlock(&mpam_srcu, idx);

	srcu_read_unlock(&mpam_srcu, idx);

}

}





static void mpam_reprogram_msc(struct mpam_msc *msc)

{

	int idx;

	u16 partid;

	bool reset;

	struct mpam_config *cfg;

	struct mpam_msc_ris *ris;



	lockdep_assert_held(&msc->lock);



	idx = srcu_read_lock(&mpam_srcu);

	list_for_each_entry_rcu(ris, &msc->ris, msc_list) {

		if (!mpam_is_enabled() && !ris->in_reset_state) {

			mpam_touch_msc(msc, &mpam_reset_ris, ris);

			ris->in_reset_state = true;

			continue;

		}



		reset = true;

		for (partid = 0; partid < mpam_partid_max; partid++) {

			cfg = &ris->comp->cfg[partid];

			if (cfg->features)

				reset = false;



			mpam_reprogram_ris_partid(ris, partid, cfg);

		}

		ris->in_reset_state = reset;

	}

	srcu_read_unlock(&mpam_srcu, idx);

}



static void _enable_percpu_irq(void *_irq)

static void _enable_percpu_irq(void *_irq)

{

{

	int *irq = _irq;

	int *irq = _irq;
@@ -813,7 +882,7 @@ static int mpam_cpu_online(unsigned int cpu) 
			_enable_percpu_irq(&msc->reenable_error_ppi);

			_enable_percpu_irq(&msc->reenable_error_ppi);





		if (atomic_fetch_inc(&msc->online_refs) == 0)

		if (atomic_fetch_inc(&msc->online_refs) == 0)

			mpam_reset_msc(msc, true);

			mpam_reprogram_msc(msc);

		mutex_unlock(&msc->lock);

		mutex_unlock(&msc->lock);

	}

	}

	srcu_read_unlock(&mpam_srcu, idx);

	srcu_read_unlock(&mpam_srcu, idx);
@@ -1433,6 +1502,37 @@ static void mpam_unregister_irqs(void) 
	cpus_read_unlock();

	cpus_read_unlock();

}

}





static int __allocate_component_cfg(struct mpam_component *comp)

{

	if (comp->cfg)

		return 0;



	comp->cfg = kcalloc(mpam_partid_max, sizeof(*comp->cfg), GFP_KERNEL);

	if (!comp->cfg)

		return -ENOMEM;



	return 0;

}



static int mpam_allocate_config(void)

{

	int err = 0;

	struct mpam_class *class;

	struct mpam_component *comp;



	lockdep_assert_held(&mpam_list_lock);



	list_for_each_entry(class, &mpam_classes, classes_list) {

		list_for_each_entry(comp, &class->components, class_list) {

			err = __allocate_component_cfg(comp);

			if (err)

				return err;

		}

	}



	return 0;

}



static void mpam_enable_once(void)

static void mpam_enable_once(void)

{

{

	int err;

	int err;
@@ -1444,12 +1544,21 @@ static void mpam_enable_once(void) 
	 */

	 */

	cpus_read_lock();

	cpus_read_lock();

	mutex_lock(&mpam_list_lock);

	mutex_lock(&mpam_list_lock);

	do {

		mpam_enable_merge_features();

		mpam_enable_merge_features();





		err = mpam_allocate_config();

		if (err) {

			pr_err("Failed to allocate configuration arrays.\n");

			break;

		}



		err = mpam_register_irqs();

		err = mpam_register_irqs();

	if (err)

		if (err) {

			pr_warn("Failed to register irqs: %d\n", err);

			pr_warn("Failed to register irqs: %d\n", err);



			break;

		}

	} while (0);

	mutex_unlock(&mpam_list_lock);

	mutex_unlock(&mpam_list_lock);

	cpus_read_unlock();

	cpus_read_unlock();
@@ -1486,6 +1595,8 @@ static void mpam_reset_class(struct mpam_class *class) 




	idx = srcu_read_lock(&mpam_srcu);

	idx = srcu_read_lock(&mpam_srcu);

	list_for_each_entry_rcu(comp, &class->components, class_list) {

	list_for_each_entry_rcu(comp, &class->components, class_list) {

		memset(comp->cfg, 0, (mpam_partid_max * sizeof(*comp->cfg)));



		list_for_each_entry_rcu(ris, &comp->ris, comp_list) {

		list_for_each_entry_rcu(ris, &comp->ris, comp_list) {

			mutex_lock(&ris->msc->lock);

			mutex_lock(&ris->msc->lock);

			mpam_touch_msc(ris->msc, mpam_reset_ris, ris);

			mpam_touch_msc(ris->msc, mpam_reset_ris, ris);
@@ -1575,6 +1686,48 @@ static int mpam_msc_drv_remove(struct platform_device *pdev) 
	return 0;

	return 0;

}

}





struct mpam_write_config_arg {

	struct mpam_msc_ris *ris;

	struct mpam_component *comp;

	u16 partid;

};



static int __write_config(void *arg)

{

	struct mpam_write_config_arg *c = arg;



	mpam_reprogram_ris_partid(c->ris, c->partid, &c->comp->cfg[c->partid]);



	return 0;

}



/* TODO: split into write_config/sync_config */

/* TODO: add config_dirty bitmap to drive sync_config */

int mpam_apply_config(struct mpam_component *comp, u16 partid,

		      struct mpam_config *cfg)

{

	struct mpam_write_config_arg arg;

	struct mpam_msc_ris *ris;

	int idx;



	lockdep_assert_cpus_held();



	comp->cfg[partid] = *cfg;

	arg.comp = comp;

	arg.partid = partid;



	idx = srcu_read_lock(&mpam_srcu);

	list_for_each_entry_rcu(ris, &comp->ris, comp_list) {

		arg.ris = ris;

		mutex_lock(&ris->msc->lock);

		mpam_touch_msc(ris->msc, __write_config, &arg);

		mutex_unlock(&ris->msc->lock);

	}

	srcu_read_unlock(&mpam_srcu, idx);



	return 0;

}



static const struct of_device_id mpam_of_match[] = {

static const struct of_device_id mpam_of_match[] = {

	{ .compatible = "arm,mpam-msc", },

	{ .compatible = "arm,mpam-msc", },

	{},

	{},

drivers/platform/mpam/mpam_internal.h

+19 −5
Original line number Original line Diff line number Diff line
@@ -102,11 +102,7 @@ struct mpam_props 
	u16			num_mbwu_mon;

	u16			num_mbwu_mon;

};

};





static inline bool mpam_has_feature(enum mpam_device_features feat,

#define mpam_has_feature(_feat, x)	((1<<_feat) & (x)->features)

				    struct mpam_props *props)

{

	return (1<<feat) & props->features;

}





static inline void mpam_set_feature(enum mpam_device_features feat,

static inline void mpam_set_feature(enum mpam_device_features feat,

				    struct mpam_props *props)

				    struct mpam_props *props)
@@ -136,6 +132,15 @@ struct mpam_class 
	struct list_head	classes_list;

	struct list_head	classes_list;

};

};





struct mpam_config {

	/* Which configuration values are valid. 0 is used for reset */

	mpam_features_t		features;



	u32	cpbm;

	u32	mbw_pbm;

	u16	mbw_max;

};



struct mpam_component

struct mpam_component

{

{

	u32			comp_id;

	u32			comp_id;
@@ -145,6 +150,12 @@ struct mpam_component 




	cpumask_t		affinity;

	cpumask_t		affinity;





	/*

	 * Array of configuration values, indexed by partid.

	 * Read from cpuhp callbacks, hold the cpuhp lock when writing.

	 */

	struct mpam_config	*cfg;



	/* member of mpam_class:components */

	/* member of mpam_class:components */

	struct list_head	class_list;

	struct list_head	class_list;
@@ -184,6 +195,9 @@ extern u8 mpam_pmg_max; 
void mpam_enable(struct work_struct *work);

void mpam_enable(struct work_struct *work);

void mpam_disable(struct work_struct *work);

void mpam_disable(struct work_struct *work);





int mpam_apply_config(struct mpam_component *comp, u16 partid,

		      struct mpam_config *cfg);



/*

/*

 * MPAM MSCs have the following register layout. See:

 * MPAM MSCs have the following register layout. See:

 * Arm Architecture Reference Manual Supplement - Memory System Resource

 * Arm Architecture Reference Manual Supplement - Memory System Resource