Commit be5b6985 authored by Ben Skeggs's avatar Ben Skeggs Committed by Karol Herbst
Browse files

drm/nouveau/disp/dp: explicitly control scrambling when setting pattern 



TPS1/2/3 require scrambling to be disabled.  The IED scripts on earlier
boards used to handle this, but appear not to anymore.

TPS4 support will also require scrambling to remain enabled.

Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
Reviewed-by: default avatarLyude Paul <lyude@redhat.com>
Signed-off-by: default avatarKarol Herbst <kherbst@redhat.com>
Link: https://gitlab.freedesktop.org/drm/nouveau/-/merge_requests/17
parent 00735459

drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c

+5 −0
Original line number Diff line number Diff line
@@ -154,6 +154,11 @@ nvkm_dp_train_pattern(struct lt_state *lt, u8 pattern) 
	nvkm_rdaux(dp->aux, DPCD_LC02, &sink_tp, 1);

	sink_tp &= ~DPCD_LC02_TRAINING_PATTERN_SET;

	sink_tp |= pattern;



	if (pattern != 0)

		sink_tp |=  DPCD_LC02_SCRAMBLING_DISABLE;

	else

		sink_tp &= ~DPCD_LC02_SCRAMBLING_DISABLE;

	nvkm_wraux(dp->aux, DPCD_LC02, &sink_tp, 1);

}

drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.h

+1 −0
Original line number Diff line number Diff line
@@ -49,6 +49,7 @@ void nvkm_dp_disable(struct nvkm_outp *, struct nvkm_ior *); 
#define DPCD_LC01_LANE_COUNT_SET                                           0x1f

#define DPCD_LC02                                                       0x00102

#define DPCD_LC02_TRAINING_PATTERN_SET                                     0x03

#define DPCD_LC02_SCRAMBLING_DISABLE                                       0x20

#define DPCD_LC03(l)                                            ((l) +  0x00103)

#define DPCD_LC03_MAX_PRE_EMPHASIS_REACHED                                 0x20

#define DPCD_LC03_PRE_EMPHASIS_SET                                         0x18

drivers/gpu/drm/nouveau/nvkm/engine/disp/sorg94.c

+12 −1
Original line number Diff line number Diff line
@@ -77,7 +77,18 @@ g94_sor_dp_pattern(struct nvkm_ior *sor, int pattern) 
{

	struct nvkm_device *device = sor->disp->engine.subdev.device;

	const u32 loff = nv50_sor_link(sor);

	nvkm_mask(device, 0x61c10c + loff, 0x0f000000, pattern << 24);

	u32 data;



	switch (pattern) {

	case 0: data = 0x00001000; break;

	case 1: data = 0x01000000; break;

	case 2: data = 0x02000000; break;

	default:

		WARN_ON(1);

		return;

	}



	nvkm_mask(device, 0x61c10c + loff, 0x0f001000, data);

}



void

drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgf119.c

+13 −1
Original line number Diff line number Diff line
@@ -92,7 +92,19 @@ gf119_sor_dp_pattern(struct nvkm_ior *sor, int pattern) 
{

	struct nvkm_device *device = sor->disp->engine.subdev.device;

	const u32 soff = nv50_ior_base(sor);

	nvkm_mask(device, 0x61c110 + soff, 0x0f0f0f0f, 0x01010101 * pattern);

	u32 data;



	switch (pattern) {

	case 0: data = 0x10101010; break;

	case 1: data = 0x01010101; break;

	case 2: data = 0x02020202; break;

	case 3: data = 0x03030303; break;

	default:

		WARN_ON(1);

		return;

	}



	nvkm_mask(device, 0x61c110 + soff, 0x1f1f1f1f, data);

}



int

drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgm107.c

+14 −3
Original line number Diff line number Diff line
@@ -28,11 +28,22 @@ gm107_sor_dp_pattern(struct nvkm_ior *sor, int pattern) 
{

	struct nvkm_device *device = sor->disp->engine.subdev.device;

	const u32 soff = nv50_ior_base(sor);

	const u32 data = 0x01010101 * pattern;

	u32 mask = 0x1f1f1f1f, data;



	switch (pattern) {

	case 0: data = 0x10101010; break;

	case 1: data = 0x01010101; break;

	case 2: data = 0x02020202; break;

	case 3: data = 0x03030303; break;

	default:

		WARN_ON(1);

		return;

	}



	if (sor->asy.link & 1)

		nvkm_mask(device, 0x61c110 + soff, 0x0f0f0f0f, data);

		nvkm_mask(device, 0x61c110 + soff, mask, data);

	else

		nvkm_mask(device, 0x61c12c + soff, 0x0f0f0f0f, data);

		nvkm_mask(device, 0x61c12c + soff, mask, data);

}



static const struct nvkm_ior_func