Commit be457264 authored by Sandipan Das's avatar Sandipan Das Committed by Wenkuan Wang
Browse files

perf/x86/amd/lbr: Discard erroneous branch entries 

mainline inclusion
from mainline-v6.9-rc1
commit 29297ffffb0bf388778bd4b581a43cee6929ae65
category: feature
bugzilla: https://gitee.com/openeuler/kernel/issues/I9A3IS


CVE: NA

--------------------------------

The Revision Guide for AMD Family 19h Model 10-1Fh processors declares
Erratum 1452 which states that non-branch entries may erroneously be
recorded in the Last Branch Record (LBR) stack with the valid and
spec bits set.

Such entries can be recognized by inspecting bit 61 of the corresponding
LastBranchStackToIp register. This bit is currently reserved but if found
to be set, the associated branch entry should be discarded.

Signed-off-by: default avatarSandipan Das <sandipan.das@amd.com>
Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Link: https://bugzilla.kernel.org/attachment.cgi?id=305518
Link: https://lore.kernel.org/r/3ad2aa305f7396d41a40e3f054f740d464b16b7f.1706526029.git.sandipan.das@amd.com


Signed-off-by: default avatarWenkuan Wang <Wenkuan.Wang@amd.com>
parent 51b73f01

arch/x86/events/amd/lbr.c

+4 −2
Original line number Diff line number Diff line
@@ -173,9 +173,11 @@ void amd_pmu_lbr_read(void) 


		/*

		 * Check if a branch has been logged; if valid = 0, spec = 0

		 * then no branch was recorded

		 * then no branch was recorded; if reserved = 1 then an

		 * erroneous branch was recorded (see Erratum 1452)

		 */

		if (!entry.to.split.valid && !entry.to.split.spec)

		if ((!entry.to.split.valid && !entry.to.split.spec) ||

		    entry.to.split.reserved)

			continue;



		perf_clear_branch_entry_bitfields(br + out);