Commit be1af02b authored by Suravee Suthikulpanit's avatar Suravee Suthikulpanit Committed by Joerg Roedel
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iommu/amd: Update sanity check when enable PRI/ATS for IOMMU v1 table



Currently, PPR/ATS can be enabled only if the domain is type
identity mapping. However, when allowing the IOMMU v2 page table
to be used for DMA-API, the check is no longer valid.

Update the sanity check to only apply for when using AMD_IOMMU_V1
page table mode.

Signed-off-by: default avatarSuravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Signed-off-by: default avatarVasant Hegde <vasant.hegde@amd.com>
Link: https://lore.kernel.org/r/20220825063939.8360-6-vasant.hegde@amd.com


Signed-off-by: default avatarJoerg Roedel <jroedel@suse.de>
parent 43312b71
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+11 −3
Original line number Diff line number Diff line
@@ -1694,7 +1694,7 @@ static void pdev_iommuv2_disable(struct pci_dev *pdev)
	pci_disable_pasid(pdev);
}

static int pdev_iommuv2_enable(struct pci_dev *pdev)
static int pdev_pri_ats_enable(struct pci_dev *pdev)
{
	int ret;

@@ -1757,11 +1757,19 @@ static int attach_device(struct device *dev,
		struct iommu_domain *def_domain = iommu_get_dma_domain(dev);

		ret = -EINVAL;
		if (def_domain->type != IOMMU_DOMAIN_IDENTITY)

		/*
		 * In case of using AMD_IOMMU_V1 page table mode and the device
		 * is enabling for PPR/ATS support (using v2 table),
		 * we need to make sure that the domain type is identity map.
		 */
		if ((amd_iommu_pgtable == AMD_IOMMU_V1) &&
		    def_domain->type != IOMMU_DOMAIN_IDENTITY) {
			goto out;
		}

		if (dev_data->iommu_v2) {
			if (pdev_iommuv2_enable(pdev) != 0)
			if (pdev_pri_ats_enable(pdev) != 0)
				goto out;

			dev_data->ats.enabled = true;