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mainline inclusion from mainline-v6.11-rc3 commit 4574815abf43e2bf05643e1b3f7a2e5d6df894f0 category: feature bugzilla: https://gitee.com/openeuler/kernel/issues/IB7Y4K CVE: NA Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=4574815abf43e2bf05643e1b3f7a2e5d6df894f0 -------------------------------- As very well explained in commit 20a004e7 ("arm64: mm: Use READ_ONCE/WRITE_ONCE when accessing page tables"), an architecture whose page table walker can modify the PTE in parallel must use READ_ONCE()/ WRITE_ONCE() macro to avoid any compiler transformation. So apply that to LoongArch which is such an architecture, in order to avoid potential problems. Similar to commit edf955647269422e ("riscv: Use accessors to page table entries instead of direct dereference"). Signed-off-by:Huacai Chen <chenhuacai@loongson.cn>