Commit bd829d57 authored by Ian Chen's avatar Ian Chen Committed by Alex Deucher
Browse files

drm/amd/display: Refactor eDP PSR codes 



We split out PSR config from "global" to "per-panel" config settings.

Tested-by: default avatarMark Broadworth <mark.broadworth@amd.com>
Reviewed-by: default avatarRobin Chen <robin.chen@amd.com>
Acked-by: default avatarRodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: default avatarIan Chen <ian.chen@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 174fc824

drivers/gpu/drm/amd/display/dc/dc.h

+0 −1
Original line number Diff line number Diff line
@@ -764,7 +764,6 @@ struct dc_debug_options { 
	bool disable_mem_low_power;

	bool pstate_enabled;

	bool disable_dmcu;

	bool disable_psr;

	bool force_abm_enable;

	bool disable_stereo_support;

	bool vsr_support;

drivers/gpu/drm/amd/display/dc/dc_link.h

+11 −3
Original line number Diff line number Diff line
@@ -117,7 +117,7 @@ struct psr_settings { 
 * Add a struct dc_panel_config under dc_link

 */

struct dc_panel_config {

	// extra panel power sequence parameters

	/* extra panel power sequence parameters */

	struct pps {

		unsigned int extra_t3_ms;

		unsigned int extra_t7_ms;
@@ -127,13 +127,21 @@ struct dc_panel_config { 
		unsigned int extra_t12_ms;

		unsigned int extra_post_OUI_ms;

	} pps;

	// ABM

	/* PSR */

	struct psr {

		bool disable_psr;

		bool disallow_psrsu;

		bool rc_disable;

		bool rc_allow_static_screen;

		bool rc_allow_fullscreen_VPB;

	} psr;

	/* ABM */

	struct varib {

		unsigned int varibright_feature_enable;

		unsigned int def_varibright_level;

		unsigned int abm_config_setting;

	} varib;

	// edp DSC

	/* edp DSC */

	struct dsc {

		bool disable_dsc_edp;

		unsigned int force_dsc_edp_policy;

drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c

+4 −1
Original line number Diff line number Diff line
@@ -671,12 +671,15 @@ static const struct dc_debug_options debug_defaults_diags = { 
		.disable_pplib_wm_range = true,

		.disable_stutter = true,

		.disable_48mhz_pwrdwn = true,

		.disable_psr = true,

		.enable_tri_buf = true,

		.use_max_lb = true

};



static const struct dc_panel_config panel_config_defaults = {

		.psr = {

			.disable_psr = false,

			.disallow_psrsu = false,

		},

		.ilr = {

			.optimize_edp_link_rate = true,

		},

drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c

+13 −2
Original line number Diff line number Diff line
@@ -723,7 +723,6 @@ static const struct dc_debug_options debug_defaults_drv = { 
	.underflow_assert_delay_us = 0xFFFFFFFF,

	.dwb_fi_phase = -1, // -1 = disable,

	.dmub_command_table = true,

	.disable_psr = false,

	.use_max_lb = true,

	.exit_idle_opt_for_cursor_updates = true

};
@@ -742,11 +741,17 @@ static const struct dc_debug_options debug_defaults_diags = { 
	.scl_reset_length10 = true,

	.dwb_fi_phase = -1, // -1 = disable

	.dmub_command_table = true,

	.disable_psr = true,

	.enable_tri_buf = true,

	.use_max_lb = true

};



static const struct dc_panel_config panel_config_defaults = {

	.psr = {

		.disable_psr = false,

		.disallow_psrsu = false,

	},

};



static void dcn30_dpp_destroy(struct dpp **dpp)

{

	kfree(TO_DCN20_DPP(*dpp));
@@ -2212,6 +2217,11 @@ void dcn30_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_params 
	}

}



static void dcn30_get_panel_config_defaults(struct dc_panel_config *panel_config)

{

	*panel_config = panel_config_defaults;

}



static const struct resource_funcs dcn30_res_pool_funcs = {

	.destroy = dcn30_destroy_resource_pool,

	.link_enc_create = dcn30_link_encoder_create,
@@ -2231,6 +2241,7 @@ static const struct resource_funcs dcn30_res_pool_funcs = { 
	.release_post_bldn_3dlut = dcn30_release_post_bldn_3dlut,

	.update_bw_bounding_box = dcn30_update_bw_bounding_box,

	.patch_unknown_plane_state = dcn20_patch_unknown_plane_state,

	.get_panel_config_defaults = dcn30_get_panel_config_defaults,

};



#define CTX ctx

drivers/gpu/drm/amd/display/dc/dcn302/dcn302_resource.c

+13 −1
Original line number Diff line number Diff line
@@ -112,10 +112,16 @@ static const struct dc_debug_options debug_defaults_diags = { 
		.dwb_fi_phase = -1, // -1 = disable

		.dmub_command_table = true,

		.enable_tri_buf = true,

		.disable_psr = true,

		.use_max_lb = true

};



static const struct dc_panel_config panel_config_defaults = {

		.psr = {

			.disable_psr = false,

			.disallow_psrsu = false,

		},

};



enum dcn302_clk_src_array_id {

	DCN302_CLK_SRC_PLL0,

	DCN302_CLK_SRC_PLL1,
@@ -1132,6 +1138,11 @@ void dcn302_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_param 
	DC_FP_END();

}



static void dcn302_get_panel_config_defaults(struct dc_panel_config *panel_config)

{

	*panel_config = panel_config_defaults;

}



static struct resource_funcs dcn302_res_pool_funcs = {

		.destroy = dcn302_destroy_resource_pool,

		.link_enc_create = dcn302_link_encoder_create,
@@ -1151,6 +1162,7 @@ static struct resource_funcs dcn302_res_pool_funcs = { 
		.release_post_bldn_3dlut = dcn30_release_post_bldn_3dlut,

		.update_bw_bounding_box = dcn302_update_bw_bounding_box,

		.patch_unknown_plane_state = dcn20_patch_unknown_plane_state,

		.get_panel_config_defaults = dcn302_get_panel_config_defaults,

};



static struct dc_cap_funcs cap_funcs = {