Loading Documentation/devicetree/bindings/display/bridge/adi,adv7511.txt +4 −0 Original line number Diff line number Diff line Loading @@ -68,6 +68,8 @@ Optional properties: - adi,disable-timing-generator: Only for ADV7533. Disables the internal timing generator. The chip will rely on the sync signals in the DSI data lanes, rather than generate its own timings for HDMI output. - clocks: from common clock binding: reference to the CEC clock. - clock-names: from common clock binding: must be "cec". Required nodes: Loading @@ -89,6 +91,8 @@ Example reg = <39>; interrupt-parent = <&gpio3>; interrupts = <29 IRQ_TYPE_EDGE_FALLING>; clocks = <&cec_clock>; clock-names = "cec"; adi,input-depth = <8>; adi,input-colorspace = "rgb"; Loading Documentation/devicetree/bindings/display/bridge/sii9234.txt 0 → 100644 +49 −0 Original line number Diff line number Diff line Silicon Image SiI9234 HDMI/MHL bridge bindings Required properties: - compatible : "sil,sii9234". - reg : I2C address for TPI interface, use 0x39 - avcc33-supply : MHL/USB Switch Supply Voltage (3.3V) - iovcc18-supply : I/O Supply Voltage (1.8V) - avcc12-supply : TMDS Analog Supply Voltage (1.2V) - cvcc12-supply : Digital Core Supply Voltage (1.2V) - interrupts, interrupt-parent: interrupt specifier of INT pin - reset-gpios: gpio specifier of RESET pin (active low) - video interfaces: Device node can contain two video interface port nodes for HDMI encoder and connector according to [1]. - port@0 - MHL to HDMI - port@1 - MHL to connector [1]: Documentation/devicetree/bindings/media/video-interfaces.txt Example: sii9234@39 { compatible = "sil,sii9234"; reg = <0x39>; avcc33-supply = <&vcc33mhl>; iovcc18-supply = <&vcc18mhl>; avcc12-supply = <&vsil12>; cvcc12-supply = <&vsil12>; reset-gpios = <&gpf3 4 GPIO_ACTIVE_LOW>; interrupt-parent = <&gpf3>; interrupts = <5 IRQ_TYPE_LEVEL_HIGH>; ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; mhl_to_hdmi: endpoint { remote-endpoint = <&hdmi_to_mhl>; }; }; port@1 { reg = <1>; mhl_to_connector: endpoint { remote-endpoint = <&connector_to_mhl>; }; }; }; }; Documentation/devicetree/bindings/display/panel/raspberrypi,7inch-touchscreen.txt 0 → 100644 +49 −0 Original line number Diff line number Diff line This binding covers the official 7" (800x480) Raspberry Pi touchscreen panel. This DSI panel contains: - TC358762 DSI->DPI bridge - Atmel microcontroller on I2C for power sequencing the DSI bridge and controlling backlight - Touchscreen controller on I2C for touch input and this binding covers the DSI display parts but not its touch input. Required properties: - compatible: Must be "raspberrypi,7inch-touchscreen-panel" - reg: Must be "45" - port: See panel-common.txt Example: dsi1: dsi@7e700000 { #address-cells = <1>; #size-cells = <0>; <...> port { dsi_out_port: endpoint { remote-endpoint = <&panel_dsi_port>; }; }; }; i2c_dsi: i2c { compatible = "i2c-gpio"; #address-cells = <1>; #size-cells = <0>; gpios = <&gpio 28 0 &gpio 29 0>; lcd@45 { compatible = "raspberrypi,7inch-touchscreen-panel"; reg = <0x45>; port { panel_dsi_port: endpoint { remote-endpoint = <&dsi_out_port>; }; }; }; }; Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt +3 −0 Original line number Diff line number Diff line Loading @@ -41,14 +41,17 @@ CEC. It is one end of the pipeline. Required properties: - compatible: value must be one of: * allwinner,sun5i-a10s-hdmi * allwinner,sun6i-a31-hdmi - reg: base address and size of memory-mapped region - interrupts: interrupt associated to this IP - clocks: phandles to the clocks feeding the HDMI encoder * ahb: the HDMI interface clock * mod: the HDMI module clock * ddc: the HDMI ddc clock (A31 only) * pll-0: the first video PLL * pll-1: the second video PLL - clock-names: the clock names mentioned above - resets: phandle to the reset control for the HDMI encoder (A31 only) - dmas: phandles to the DMA channels used by the HDMI encoder * ddc-tx: The channel for DDC transmission * ddc-rx: The channel for DDC reception Loading drivers/dma-buf/reservation.c +42 −14 Original line number Diff line number Diff line Loading @@ -266,8 +266,7 @@ EXPORT_SYMBOL(reservation_object_add_excl_fence); * @dst: the destination reservation object * @src: the source reservation object * * Copy all fences from src to dst. Both src->lock as well as dst-lock must be * held. * Copy all fences from src to dst. dst-lock must be held. */ int reservation_object_copy_fences(struct reservation_object *dst, struct reservation_object *src) Loading @@ -277,33 +276,62 @@ int reservation_object_copy_fences(struct reservation_object *dst, size_t size; unsigned i; src_list = reservation_object_get_list(src); rcu_read_lock(); src_list = rcu_dereference(src->fence); retry: if (src_list) { size = offsetof(typeof(*src_list), shared[src_list->shared_count]); unsigned shared_count = src_list->shared_count; size = offsetof(typeof(*src_list), shared[shared_count]); rcu_read_unlock(); dst_list = kmalloc(size, GFP_KERNEL); if (!dst_list) return -ENOMEM; dst_list->shared_count = src_list->shared_count; dst_list->shared_max = src_list->shared_count; for (i = 0; i < src_list->shared_count; ++i) dst_list->shared[i] = dma_fence_get(src_list->shared[i]); rcu_read_lock(); src_list = rcu_dereference(src->fence); if (!src_list || src_list->shared_count > shared_count) { kfree(dst_list); goto retry; } dst_list->shared_count = 0; dst_list->shared_max = shared_count; for (i = 0; i < src_list->shared_count; ++i) { struct dma_fence *fence; fence = rcu_dereference(src_list->shared[i]); if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags)) continue; if (!dma_fence_get_rcu(fence)) { kfree(dst_list); src_list = rcu_dereference(src->fence); goto retry; } if (dma_fence_is_signaled(fence)) { dma_fence_put(fence); continue; } dst_list->shared[dst_list->shared_count++] = fence; } } else { dst_list = NULL; } new = dma_fence_get_rcu_safe(&src->fence_excl); rcu_read_unlock(); kfree(dst->staged); dst->staged = NULL; src_list = reservation_object_get_list(dst); old = reservation_object_get_excl(dst); new = reservation_object_get_excl(src); dma_fence_get(new); preempt_disable(); write_seqcount_begin(&dst->seq); Loading Loading
Documentation/devicetree/bindings/display/bridge/adi,adv7511.txt +4 −0 Original line number Diff line number Diff line Loading @@ -68,6 +68,8 @@ Optional properties: - adi,disable-timing-generator: Only for ADV7533. Disables the internal timing generator. The chip will rely on the sync signals in the DSI data lanes, rather than generate its own timings for HDMI output. - clocks: from common clock binding: reference to the CEC clock. - clock-names: from common clock binding: must be "cec". Required nodes: Loading @@ -89,6 +91,8 @@ Example reg = <39>; interrupt-parent = <&gpio3>; interrupts = <29 IRQ_TYPE_EDGE_FALLING>; clocks = <&cec_clock>; clock-names = "cec"; adi,input-depth = <8>; adi,input-colorspace = "rgb"; Loading
Documentation/devicetree/bindings/display/bridge/sii9234.txt 0 → 100644 +49 −0 Original line number Diff line number Diff line Silicon Image SiI9234 HDMI/MHL bridge bindings Required properties: - compatible : "sil,sii9234". - reg : I2C address for TPI interface, use 0x39 - avcc33-supply : MHL/USB Switch Supply Voltage (3.3V) - iovcc18-supply : I/O Supply Voltage (1.8V) - avcc12-supply : TMDS Analog Supply Voltage (1.2V) - cvcc12-supply : Digital Core Supply Voltage (1.2V) - interrupts, interrupt-parent: interrupt specifier of INT pin - reset-gpios: gpio specifier of RESET pin (active low) - video interfaces: Device node can contain two video interface port nodes for HDMI encoder and connector according to [1]. - port@0 - MHL to HDMI - port@1 - MHL to connector [1]: Documentation/devicetree/bindings/media/video-interfaces.txt Example: sii9234@39 { compatible = "sil,sii9234"; reg = <0x39>; avcc33-supply = <&vcc33mhl>; iovcc18-supply = <&vcc18mhl>; avcc12-supply = <&vsil12>; cvcc12-supply = <&vsil12>; reset-gpios = <&gpf3 4 GPIO_ACTIVE_LOW>; interrupt-parent = <&gpf3>; interrupts = <5 IRQ_TYPE_LEVEL_HIGH>; ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; mhl_to_hdmi: endpoint { remote-endpoint = <&hdmi_to_mhl>; }; }; port@1 { reg = <1>; mhl_to_connector: endpoint { remote-endpoint = <&connector_to_mhl>; }; }; }; };
Documentation/devicetree/bindings/display/panel/raspberrypi,7inch-touchscreen.txt 0 → 100644 +49 −0 Original line number Diff line number Diff line This binding covers the official 7" (800x480) Raspberry Pi touchscreen panel. This DSI panel contains: - TC358762 DSI->DPI bridge - Atmel microcontroller on I2C for power sequencing the DSI bridge and controlling backlight - Touchscreen controller on I2C for touch input and this binding covers the DSI display parts but not its touch input. Required properties: - compatible: Must be "raspberrypi,7inch-touchscreen-panel" - reg: Must be "45" - port: See panel-common.txt Example: dsi1: dsi@7e700000 { #address-cells = <1>; #size-cells = <0>; <...> port { dsi_out_port: endpoint { remote-endpoint = <&panel_dsi_port>; }; }; }; i2c_dsi: i2c { compatible = "i2c-gpio"; #address-cells = <1>; #size-cells = <0>; gpios = <&gpio 28 0 &gpio 29 0>; lcd@45 { compatible = "raspberrypi,7inch-touchscreen-panel"; reg = <0x45>; port { panel_dsi_port: endpoint { remote-endpoint = <&dsi_out_port>; }; }; }; };
Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt +3 −0 Original line number Diff line number Diff line Loading @@ -41,14 +41,17 @@ CEC. It is one end of the pipeline. Required properties: - compatible: value must be one of: * allwinner,sun5i-a10s-hdmi * allwinner,sun6i-a31-hdmi - reg: base address and size of memory-mapped region - interrupts: interrupt associated to this IP - clocks: phandles to the clocks feeding the HDMI encoder * ahb: the HDMI interface clock * mod: the HDMI module clock * ddc: the HDMI ddc clock (A31 only) * pll-0: the first video PLL * pll-1: the second video PLL - clock-names: the clock names mentioned above - resets: phandle to the reset control for the HDMI encoder (A31 only) - dmas: phandles to the DMA channels used by the HDMI encoder * ddc-tx: The channel for DDC transmission * ddc-rx: The channel for DDC reception Loading
drivers/dma-buf/reservation.c +42 −14 Original line number Diff line number Diff line Loading @@ -266,8 +266,7 @@ EXPORT_SYMBOL(reservation_object_add_excl_fence); * @dst: the destination reservation object * @src: the source reservation object * * Copy all fences from src to dst. Both src->lock as well as dst-lock must be * held. * Copy all fences from src to dst. dst-lock must be held. */ int reservation_object_copy_fences(struct reservation_object *dst, struct reservation_object *src) Loading @@ -277,33 +276,62 @@ int reservation_object_copy_fences(struct reservation_object *dst, size_t size; unsigned i; src_list = reservation_object_get_list(src); rcu_read_lock(); src_list = rcu_dereference(src->fence); retry: if (src_list) { size = offsetof(typeof(*src_list), shared[src_list->shared_count]); unsigned shared_count = src_list->shared_count; size = offsetof(typeof(*src_list), shared[shared_count]); rcu_read_unlock(); dst_list = kmalloc(size, GFP_KERNEL); if (!dst_list) return -ENOMEM; dst_list->shared_count = src_list->shared_count; dst_list->shared_max = src_list->shared_count; for (i = 0; i < src_list->shared_count; ++i) dst_list->shared[i] = dma_fence_get(src_list->shared[i]); rcu_read_lock(); src_list = rcu_dereference(src->fence); if (!src_list || src_list->shared_count > shared_count) { kfree(dst_list); goto retry; } dst_list->shared_count = 0; dst_list->shared_max = shared_count; for (i = 0; i < src_list->shared_count; ++i) { struct dma_fence *fence; fence = rcu_dereference(src_list->shared[i]); if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags)) continue; if (!dma_fence_get_rcu(fence)) { kfree(dst_list); src_list = rcu_dereference(src->fence); goto retry; } if (dma_fence_is_signaled(fence)) { dma_fence_put(fence); continue; } dst_list->shared[dst_list->shared_count++] = fence; } } else { dst_list = NULL; } new = dma_fence_get_rcu_safe(&src->fence_excl); rcu_read_unlock(); kfree(dst->staged); dst->staged = NULL; src_list = reservation_object_get_list(dst); old = reservation_object_get_excl(dst); new = reservation_object_get_excl(src); dma_fence_get(new); preempt_disable(); write_seqcount_begin(&dst->seq); Loading