Commit bd1ee06e authored by Bibo Mao's avatar Bibo Mao Committed by Hongchen Zhang
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LoongArch: fix two cpu hotplug problem

LoongArch inclusion
category: bugfix
bugzilla: https://gitee.com/openeuler/kernel/issues/I8H1QC



------------------------------------------

1. When cpu is hotplug out, cpu is in idle state and function
arch_cpu_idle_dead is called. Timer interrupt for this processor should
be disabled, else there will be timer interrupt for the dead cpu. Also
this prevents vcpu to schedule out during halt-polling flow when system
is running in vm mode, since there is pending timer interrupt.

This patch adds detailed implementation for timer shutdown interface, so
that timer will be disabled when cpu is plug-out.

2. for woken-up cpu, entry address is 8 bytes, we should check first low 4
bytes and then high 4 bytes.

Signed-off-by: default avatarBibo Mao <maobibo@loongson.cn>
Signed-off-by: default avatarHongchen Zhang <zhanghongchen@loongson.cn>
parent 74d2d8c9
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+15 −2
Original line number Diff line number Diff line
@@ -310,6 +310,10 @@ void play_dead(void)
	register void (*init_fn)(void);

	idle_task_exit();
	/*
	 * vcpu can be woken up from idle emulation in vm if irq is disabled
	 */
	if (!cpu_has_hypervisor)
		local_irq_enable();
	set_csr_ecfg(ECFGF_IPI);
	__this_cpu_write(cpu_state, CPU_DEAD);
@@ -317,9 +321,18 @@ void play_dead(void)
	__smp_mb();
	do {
		__asm__ __volatile__("idle 0\n\t");
		addr = iocsr_read64(LOONGARCH_IOCSR_MBUF0);
		/*
		 * mailbox info is wroten from other CPU with IPI send method
		 * in function csr_mail_send, only 4 bytes can be wroten with
		 * IPI send method in one time.
		 *
		 * High 4 bytes is sent and then low 4 bytes for 8 bytes mail
		 * sending method. Here low 4 bytes is read by the first.
		 */
		addr = iocsr_read32(LOONGARCH_IOCSR_MBUF0);
	} while (addr == 0);

	addr = iocsr_read64(LOONGARCH_IOCSR_MBUF0);
	init_fn = (void *)TO_CACHE(addr);
	iocsr_write32(0xffffffff, LOONGARCH_IOCSR_IPI_CLEAR);

+9 −16
Original line number Diff line number Diff line
@@ -59,21 +59,6 @@ static int constant_set_state_oneshot(struct clock_event_device *evt)
	return 0;
}

static int constant_set_state_oneshot_stopped(struct clock_event_device *evt)
{
	unsigned long timer_config;

	raw_spin_lock(&state_lock);

	timer_config = csr_read64(LOONGARCH_CSR_TCFG);
	timer_config &= ~CSR_TCFG_EN;
	csr_write64(timer_config, LOONGARCH_CSR_TCFG);

	raw_spin_unlock(&state_lock);

	return 0;
}

static int constant_set_state_periodic(struct clock_event_device *evt)
{
	unsigned long period;
@@ -93,6 +78,14 @@ static int constant_set_state_periodic(struct clock_event_device *evt)

static int constant_set_state_shutdown(struct clock_event_device *evt)
{
	unsigned long timer_config;

	raw_spin_lock(&state_lock);
	timer_config = csr_read64(LOONGARCH_CSR_TCFG);
	timer_config &= ~CSR_TCFG_EN;
	csr_write64(timer_config, LOONGARCH_CSR_TCFG);
	raw_spin_unlock(&state_lock);

	return 0;
}

@@ -161,7 +154,7 @@ int constant_clockevent_init(void)
	cd->rating = 320;
	cd->cpumask = cpumask_of(cpu);
	cd->set_state_oneshot = constant_set_state_oneshot;
	cd->set_state_oneshot_stopped = constant_set_state_oneshot_stopped;
	cd->set_state_oneshot_stopped = constant_set_state_shutdown;
	cd->set_state_periodic = constant_set_state_periodic;
	cd->set_state_shutdown = constant_set_state_shutdown;
	cd->set_next_event = constant_timer_next_event;