Commit bd1407ed authored by Shayne Chen's avatar Shayne Chen Committed by Felix Fietkau
Browse files

mt76: mt7915: fix beamforming mib stats 



Some of beamforming mib counters are moved to different offsets
or registers in newer chipsets.

Fixes: 99ad32a4 ("mt76: mt7915: add support for MT7986")
Signed-off-by: default avatarShayne Chen <shayne.chen@mediatek.com>
Signed-off-by: default avatarFelix Fietkau <nbd@nbd.name>
parent 70493b86

drivers/net/wireless/mediatek/mt76/mt7915/mac.c

+46 −27
Original line number Diff line number Diff line
@@ -2185,15 +2185,6 @@ void mt7915_mac_update_stats(struct mt7915_phy *phy) 
	cnt = mt76_rr(dev, MT_MIB_SDR31(phy->band_idx));

	mib->rx_ba_cnt += cnt;



	cnt = mt76_rr(dev, MT_MIB_SDR32(phy->band_idx));

	mib->tx_pkt_ebf_cnt += FIELD_GET(MT_MIB_SDR32_TX_PKT_EBF_CNT_MASK, cnt);



	if (is_mt7915(&dev->mt76))

		cnt = mt76_rr(dev, MT_MIB_SDR33(phy->band_idx));

	mib->tx_pkt_ibf_cnt += is_mt7915(&dev->mt76) ?

		       FIELD_GET(MT_MIB_SDR32_TX_PKT_IBF_CNT_MASK, cnt) :

		       FIELD_GET(MT_MIB_SDR32_TX_PKT_IBF_CNT_MASK_MT7916, cnt);



	cnt = mt76_rr(dev, MT_MIB_SDRMUBF(phy->band_idx));

	mib->tx_bf_cnt += FIELD_GET(MT_MIB_MU_BF_TX_CNT, cnt);
@@ -2206,24 +2197,10 @@ void mt7915_mac_update_stats(struct mt7915_phy *phy) 
	cnt = mt76_rr(dev, MT_MIB_DR11(phy->band_idx));

	mib->tx_su_acked_mpdu_cnt += cnt;



	cnt = mt76_rr(dev, MT_ETBF_TX_APP_CNT(phy->band_idx));

	mib->tx_bf_ibf_ppdu_cnt += FIELD_GET(MT_ETBF_TX_IBF_CNT, cnt);

	mib->tx_bf_ebf_ppdu_cnt += FIELD_GET(MT_ETBF_TX_EBF_CNT, cnt);



	cnt = mt76_rr(dev, MT_ETBF_RX_FB_CNT(phy->band_idx));

	mib->tx_bf_rx_fb_all_cnt += FIELD_GET(MT_ETBF_RX_FB_ALL, cnt);

	mib->tx_bf_rx_fb_he_cnt += FIELD_GET(MT_ETBF_RX_FB_HE, cnt);

	mib->tx_bf_rx_fb_vht_cnt += FIELD_GET(MT_ETBF_RX_FB_VHT, cnt);

	mib->tx_bf_rx_fb_ht_cnt += FIELD_GET(MT_ETBF_RX_FB_HT, cnt);



	cnt = mt76_rr(dev, MT_ETBF_RX_FB_CONT(phy->band_idx));

	mib->tx_bf_rx_fb_bw = FIELD_GET(MT_ETBF_RX_FB_BW, cnt);

	mib->tx_bf_rx_fb_nc_cnt += FIELD_GET(MT_ETBF_RX_FB_NC, cnt);

	mib->tx_bf_rx_fb_nr_cnt += FIELD_GET(MT_ETBF_RX_FB_NR, cnt);



	cnt = mt76_rr(dev, MT_ETBF_TX_NDP_BFRP(phy->band_idx));

	mib->tx_bf_fb_cpl_cnt += FIELD_GET(MT_ETBF_TX_FB_CPL, cnt);

	mib->tx_bf_fb_trig_cnt += FIELD_GET(MT_ETBF_TX_FB_TRI, cnt);

	cnt = mt76_rr(dev, MT_ETBF_PAR_RPT0(phy->band_idx));

	mib->tx_bf_rx_fb_bw = FIELD_GET(MT_ETBF_PAR_RPT0_FB_BW, cnt);

	mib->tx_bf_rx_fb_nc_cnt += FIELD_GET(MT_ETBF_PAR_RPT0_FB_NC, cnt);

	mib->tx_bf_rx_fb_nr_cnt += FIELD_GET(MT_ETBF_PAR_RPT0_FB_NR, cnt);



	for (i = 0; i < ARRAY_SIZE(mib->tx_amsdu); i++) {

		cnt = mt76_rr(dev, MT_PLE_AMSDU_PACK_MSDU_CNT(i));
@@ -2252,6 +2229,26 @@ void mt7915_mac_update_stats(struct mt7915_phy *phy) 
			dev->mt76.aggr_stats[aggr1++] += val & 0xffff;

			dev->mt76.aggr_stats[aggr1++] += val >> 16;

		}



		cnt = mt76_rr(dev, MT_MIB_SDR32(phy->band_idx));

		mib->tx_pkt_ebf_cnt += FIELD_GET(MT_MIB_SDR32_TX_PKT_EBF_CNT, cnt);



		cnt = mt76_rr(dev, MT_MIB_SDR33(phy->band_idx));

		mib->tx_pkt_ibf_cnt += FIELD_GET(MT_MIB_SDR33_TX_PKT_IBF_CNT, cnt);



		cnt = mt76_rr(dev, MT_ETBF_TX_APP_CNT(phy->band_idx));

		mib->tx_bf_ibf_ppdu_cnt += FIELD_GET(MT_ETBF_TX_IBF_CNT, cnt);

		mib->tx_bf_ebf_ppdu_cnt += FIELD_GET(MT_ETBF_TX_EBF_CNT, cnt);



		cnt = mt76_rr(dev, MT_ETBF_TX_NDP_BFRP(phy->band_idx));

		mib->tx_bf_fb_cpl_cnt += FIELD_GET(MT_ETBF_TX_FB_CPL, cnt);

		mib->tx_bf_fb_trig_cnt += FIELD_GET(MT_ETBF_TX_FB_TRI, cnt);



		cnt = mt76_rr(dev, MT_ETBF_RX_FB_CNT(phy->band_idx));

		mib->tx_bf_rx_fb_all_cnt += FIELD_GET(MT_ETBF_RX_FB_ALL, cnt);

		mib->tx_bf_rx_fb_he_cnt += FIELD_GET(MT_ETBF_RX_FB_HE, cnt);

		mib->tx_bf_rx_fb_vht_cnt += FIELD_GET(MT_ETBF_RX_FB_VHT, cnt);

		mib->tx_bf_rx_fb_ht_cnt += FIELD_GET(MT_ETBF_RX_FB_HT, cnt);

	} else {

		for (i = 0; i < 2; i++) {

			/* rts count */
@@ -2280,6 +2277,28 @@ void mt7915_mac_update_stats(struct mt7915_phy *phy) 
			dev->mt76.aggr_stats[aggr0++] += FIELD_GET(GENMASK(15, 0), val);

			dev->mt76.aggr_stats[aggr0++] += FIELD_GET(GENMASK(31, 16), val);

		}



		cnt = mt76_rr(dev, MT_MIB_SDR32(phy->band_idx));

		mib->tx_pkt_ibf_cnt += FIELD_GET(MT_MIB_SDR32_TX_PKT_IBF_CNT, cnt);

		mib->tx_bf_ibf_ppdu_cnt += FIELD_GET(MT_MIB_SDR32_TX_PKT_IBF_CNT, cnt);

		mib->tx_pkt_ebf_cnt += FIELD_GET(MT_MIB_SDR32_TX_PKT_EBF_CNT, cnt);

		mib->tx_bf_ebf_ppdu_cnt += FIELD_GET(MT_MIB_SDR32_TX_PKT_EBF_CNT, cnt);



		cnt = mt76_rr(dev, MT_MIB_BFCR7(phy->band_idx));

		mib->tx_bf_fb_cpl_cnt += FIELD_GET(MT_MIB_BFCR7_BFEE_TX_FB_CPL, cnt);



		cnt = mt76_rr(dev, MT_MIB_BFCR2(phy->band_idx));

		mib->tx_bf_fb_trig_cnt += FIELD_GET(MT_MIB_BFCR2_BFEE_TX_FB_TRIG, cnt);



		cnt = mt76_rr(dev, MT_MIB_BFCR0(phy->band_idx));

		mib->tx_bf_rx_fb_vht_cnt += FIELD_GET(MT_MIB_BFCR0_RX_FB_VHT, cnt);

		mib->tx_bf_rx_fb_all_cnt += FIELD_GET(MT_MIB_BFCR0_RX_FB_VHT, cnt);

		mib->tx_bf_rx_fb_ht_cnt += FIELD_GET(MT_MIB_BFCR0_RX_FB_HT, cnt);

		mib->tx_bf_rx_fb_all_cnt += FIELD_GET(MT_MIB_BFCR0_RX_FB_HT, cnt);



		cnt = mt76_rr(dev, MT_MIB_BFCR1(phy->band_idx));

		mib->tx_bf_rx_fb_he_cnt += FIELD_GET(MT_MIB_BFCR1_RX_FB_HE, cnt);

		mib->tx_bf_rx_fb_all_cnt += FIELD_GET(MT_MIB_BFCR1_RX_FB_HE, cnt);

	}

}

drivers/net/wireless/mediatek/mt76/mt7915/mmio.c

+2 −0
Original line number Diff line number Diff line
@@ -122,6 +122,7 @@ static const u32 mt7915_offs[] = { 
	[PLE_PG_HIF_GROUP]	= 0x110,

	[PLE_HIF_PG_INFO]	= 0x114,

	[AC_OFFSET]		= 0x040,

	[ETBF_PAR_RPT0]		= 0x068,

};



static const u32 mt7916_offs[] = {
@@ -194,6 +195,7 @@ static const u32 mt7916_offs[] = { 
	[PLE_PG_HIF_GROUP]	= 0x00c,

	[PLE_HIF_PG_INFO]	= 0x388,

	[AC_OFFSET]		= 0x080,

	[ETBF_PAR_RPT0]		= 0x100,

};



static const struct __map mt7915_reg_map[] = {

drivers/net/wireless/mediatek/mt76/mt7915/regs.h

+21 −7
Original line number Diff line number Diff line
@@ -103,6 +103,7 @@ enum offs_rev { 
	PLE_PG_HIF_GROUP,

	PLE_HIF_PG_INFO,

	AC_OFFSET,

	ETBF_PAR_RPT0,

	__MT_OFFS_MAX,

};
@@ -223,10 +224,10 @@ enum offs_rev { 
#define MT_ETBF_TX_FB_CPL		GENMASK(31, 16)

#define MT_ETBF_TX_FB_TRI		GENMASK(15, 0)



#define MT_ETBF_RX_FB_CONT(_band)	MT_WF_ETBF(_band, 0x068)

#define MT_ETBF_RX_FB_BW		GENMASK(7, 6)

#define MT_ETBF_RX_FB_NC		GENMASK(5, 3)

#define MT_ETBF_RX_FB_NR		GENMASK(2, 0)

#define MT_ETBF_PAR_RPT0(_band)		MT_WF_ETBF(_band, __OFFS(ETBF_PAR_RPT0))

#define MT_ETBF_PAR_RPT0_FB_BW		GENMASK(7, 6)

#define MT_ETBF_PAR_RPT0_FB_NC		GENMASK(5, 3)

#define MT_ETBF_PAR_RPT0_FB_NR		GENMASK(2, 0)



#define MT_ETBF_TX_APP_CNT(_band)	MT_WF_ETBF(_band, 0x0f0)

#define MT_ETBF_TX_IBF_CNT		GENMASK(31, 16)
@@ -367,11 +368,11 @@ enum offs_rev { 
#define MT_MIB_SDR31(_band)		MT_WF_MIB(_band, __OFFS(MIB_SDR31))



#define MT_MIB_SDR32(_band)		MT_WF_MIB(_band, __OFFS(MIB_SDR32))

#define MT_MIB_SDR32_TX_PKT_EBF_CNT_MASK	GENMASK(15, 0)

#define MT_MIB_SDR32_TX_PKT_EBF_CNT	GENMASK(15, 0)

#define MT_MIB_SDR32_TX_PKT_IBF_CNT	GENMASK(31, 16)



#define MT_MIB_SDR33(_band)		MT_WF_MIB(_band, 0x088)

#define MT_MIB_SDR32_TX_PKT_IBF_CNT_MASK	GENMASK(15, 0)

#define MT_MIB_SDR32_TX_PKT_IBF_CNT_MASK_MT7916	GENMASK(31, 16)

#define MT_MIB_SDR33_TX_PKT_IBF_CNT	GENMASK(15, 0)



#define MT_MIB_SDRMUBF(_band)		MT_WF_MIB(_band, __OFFS(MIB_SDRMUBF))

#define MT_MIB_MU_BF_TX_CNT		GENMASK(15, 0)
@@ -401,6 +402,19 @@ enum offs_rev { 
						  ((n) << 2))

#define MT_MIB_ARNCR_RANGE(val, n)	(((val) >> ((n) << 3)) & GENMASK(7, 0))



#define MT_MIB_BFCR0(_band)		MT_WF_MIB(_band, 0x7b0)

#define MT_MIB_BFCR0_RX_FB_HT		GENMASK(15, 0)

#define MT_MIB_BFCR0_RX_FB_VHT		GENMASK(31, 16)



#define MT_MIB_BFCR1(_band)		MT_WF_MIB(_band, 0x7b4)

#define MT_MIB_BFCR1_RX_FB_HE		GENMASK(15, 0)



#define MT_MIB_BFCR2(_band)		MT_WF_MIB(_band, 0x7b8)

#define MT_MIB_BFCR2_BFEE_TX_FB_TRIG	GENMASK(15, 0)



#define MT_MIB_BFCR7(_band)		MT_WF_MIB(_band, 0x7cc)

#define MT_MIB_BFCR7_BFEE_TX_FB_CPL	GENMASK(15, 0)



/* WTBLON TOP */

#define MT_WTBLON_TOP_BASE		0x820d4000

#define MT_WTBLON_TOP(ofs)		(MT_WTBLON_TOP_BASE + (ofs))