Unverified Commit bd07f46b authored by openeuler-ci-bot's avatar openeuler-ci-bot Committed by Gitee
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!3100 Default select PAGE_POOL_STATS, add command queue trace for hns3

Merge Pull Request from: @svishen 
 
This pr select PAGE_POOL_STATS and add command queue trace for hns3

issue:
https://gitee.com/openeuler/kernel/issues/I8J9ZZ
https://gitee.com/openeuler/kernel/issues/I8GK5Q 
 
Link:https://gitee.com/openeuler/kernel/pulls/3100

 

Reviewed-by: default avatarLiu Chao <liuchao173@huawei.com>
Signed-off-by: default avatarJialin Zhang <zhangjialin11@huawei.com>
parents 12e09ae6 994cd2e0
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+1 −1
Original line number Diff line number Diff line
@@ -1946,7 +1946,7 @@ CONFIG_SOCK_VALIDATE_XMIT=y
CONFIG_NET_SOCK_MSG=y
CONFIG_NET_DEVLINK=y
CONFIG_PAGE_POOL=y
# CONFIG_PAGE_POOL_STATS is not set
CONFIG_PAGE_POOL_STATS=y
CONFIG_FAILOVER=m
CONFIG_ETHTOOL_NETLINK=y
CONFIG_HAVE_EBPF_JIT=y
+1 −0
Original line number Diff line number Diff line
@@ -92,6 +92,7 @@ config HNS3
	depends on PCI
	select NET_DEVLINK
	select PAGE_POOL
	select PAGE_POOL_STATS
	help
	  This selects the framework support for Hisilicon Network Subsystem 3.
	  This layer facilitates clients like ENET, RoCE and user-space ethernet
+18 −0
Original line number Diff line number Diff line
@@ -471,10 +471,14 @@ static int hclge_comm_cmd_check_result(struct hclge_comm_hw *hw,
int hclge_comm_cmd_send(struct hclge_comm_hw *hw, struct hclge_desc *desc,
			int num)
{
	bool is_special = hclge_comm_is_special_opcode(desc->opcode);
	struct hclge_comm_cmq_ring *csq = &hw->cmq.csq;
	int ret;
	int ntc;

	if (hw->cmq.ops.trace_cmd_send)
		hw->cmq.ops.trace_cmd_send(hw, desc, num, is_special);

	spin_lock_bh(&hw->cmq.csq.lock);

	if (test_bit(HCLGE_COMM_STATE_CMD_DISABLE, &hw->comm_state)) {
@@ -508,6 +512,9 @@ int hclge_comm_cmd_send(struct hclge_comm_hw *hw, struct hclge_desc *desc,

	spin_unlock_bh(&hw->cmq.csq.lock);

	if (hw->cmq.ops.trace_cmd_get)
		hw->cmq.ops.trace_cmd_get(hw, desc, num, is_special);

	return ret;
}

@@ -585,6 +592,17 @@ int hclge_comm_cmd_queue_init(struct pci_dev *pdev, struct hclge_comm_hw *hw)
	return ret;
}

void hclge_comm_cmd_init_ops(struct hclge_comm_hw *hw,
			     const struct hclge_comm_cmq_ops *ops)
{
	struct hclge_comm_cmq *cmdq = &hw->cmq;

	if (ops) {
		cmdq->ops.trace_cmd_send = ops->trace_cmd_send;
		cmdq->ops.trace_cmd_get = ops->trace_cmd_get;
	}
}

int hclge_comm_cmd_init(struct hnae3_ae_dev *ae_dev, struct hclge_comm_hw *hw,
			u32 *fw_version, bool is_pf,
			unsigned long reset_pending)
+13 −1
Original line number Diff line number Diff line
@@ -440,11 +440,22 @@ enum hclge_comm_cmd_status {
	HCLGE_COMM_ERR_CSQ_ERROR	= -3,
};

struct hclge_comm_hw;
struct hclge_comm_cmq_ops {
	void (*trace_cmd_send)(struct hclge_comm_hw *hw,
			       struct hclge_desc *desc,
			       int num, bool is_special);
	void (*trace_cmd_get)(struct hclge_comm_hw *hw,
			      struct hclge_desc *desc,
			      int num, bool is_special);
};

struct hclge_comm_cmq {
	struct hclge_comm_cmq_ring csq;
	struct hclge_comm_cmq_ring crq;
	u16 tx_timeout;
	enum hclge_comm_cmd_status last_status;
	struct hclge_comm_cmq_ops ops;
};

struct hclge_comm_hw {
@@ -491,5 +502,6 @@ int hclge_comm_cmd_queue_init(struct pci_dev *pdev, struct hclge_comm_hw *hw);
int hclge_comm_cmd_init(struct hnae3_ae_dev *ae_dev, struct hclge_comm_hw *hw,
			u32 *fw_version, bool is_pf,
			unsigned long reset_pending);

void hclge_comm_cmd_init_ops(struct hclge_comm_hw *hw,
			     const struct hclge_comm_cmq_ops *ops);
#endif
+45 −0
Original line number Diff line number Diff line
@@ -35,6 +35,8 @@
#include "hclge_unic_guid.h"
#include "hclge_unic_addr.h"

#include "hclge_trace.h"

#define HCLGE_NAME			"hclge"

#define HCLGE_BUF_SIZE_UNIT	256U
@@ -408,6 +410,48 @@ int hclge_cmd_send(struct hclge_hw *hw, struct hclge_desc *desc, int num)
	return hclge_comm_cmd_send(&hw->hw, desc, num);
}

static void hclge_trace_cmd_send(struct hclge_comm_hw *hw, struct hclge_desc *desc,
				 int num, bool is_special)
{
	int i;

	trace_hclge_pf_cmd_send(hw, desc, 0, num);

	if (!is_special) {
		for (i = 1; i < num; i++)
			trace_hclge_pf_cmd_send(hw, &desc[i], i, num);
	} else {
		for (i = 1; i < num; i++)
			trace_hclge_pf_special_cmd_send(hw, (u32 *)&desc[i],
							i, num);
	}
}

static void hclge_trace_cmd_get(struct hclge_comm_hw *hw, struct hclge_desc *desc,
				int num, bool is_special)
{
	int i;

	if (!HCLGE_COMM_SEND_SYNC(le16_to_cpu(desc->flag)))
		return;

	trace_hclge_pf_cmd_get(hw, desc, 0, num);

	if (!is_special) {
		for (i = 1; i < num; i++)
			trace_hclge_pf_cmd_get(hw, &desc[i], i, num);
	} else {
		for (i = 1; i < num; i++)
			trace_hclge_pf_special_cmd_get(hw, (u32 *)&desc[i],
						       i, num);
	}
}

static const struct hclge_comm_cmq_ops hclge_cmq_ops = {
	.trace_cmd_send = hclge_trace_cmd_send,
	.trace_cmd_get = hclge_trace_cmd_get,
};

static int hclge_mac_update_stats_defective(struct hclge_dev *hdev)
{
#define HCLGE_MAC_CMD_NUM 21
@@ -12386,6 +12430,7 @@ static int hclge_init_ae_dev(struct hnae3_ae_dev *ae_dev)
		goto err_devlink_uninit;

	/* Firmware command initialize */
	hclge_comm_cmd_init_ops(&hdev->hw.hw, &hclge_cmq_ops);
	ret = hclge_comm_cmd_init(hdev->ae_dev, &hdev->hw.hw, &hdev->fw_version,
				  true, hdev->reset_pending);
	if (ret)
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