Commit bc3895b2 authored by Anson Huang's avatar Anson Huang Committed by Shawn Guo
Browse files

arm64: dts: imx8qxp-mek: Sort labels alphabetically



Sort the labels alphabetically for consistency.

Signed-off-by: default avatarAnson Huang <Anson.Huang@nxp.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent ebfa8951
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+30 −30
Original line number Diff line number Diff line
@@ -30,29 +30,8 @@
	};
};

&adma_lpuart0 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_lpuart0>;
	status = "okay";
};

&fec1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_fec1>;
	phy-mode = "rgmii-id";
	phy-handle = <&ethphy0>;
	fsl,magic-packet;
&adma_dsp {
	status = "okay";

	mdio {
		#address-cells = <1>;
		#size-cells = <0>;

		ethphy0: ethernet-phy@0 {
			compatible = "ethernet-phy-ieee802.3-c22";
			reg = <0>;
		};
	};
};

&adma_i2c1 {
@@ -131,6 +110,35 @@
	};
};

&adma_lpuart0 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_lpuart0>;
	status = "okay";
};

&fec1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_fec1>;
	phy-mode = "rgmii-id";
	phy-handle = <&ethphy0>;
	fsl,magic-packet;
	status = "okay";

	mdio {
		#address-cells = <1>;
		#size-cells = <0>;

		ethphy0: ethernet-phy@0 {
			compatible = "ethernet-phy-ieee802.3-c22";
			reg = <0>;
		};
	};
};

&scu_key {
	status = "okay";
};

&usdhc1 {
	assigned-clocks = <&clk IMX_CONN_SDHC0_CLK>;
	assigned-clock-rates = <200000000>;
@@ -229,11 +237,3 @@
		>;
	};
};

&adma_dsp {
	status = "okay";
};

&scu_key {
	status = "okay";
};