Commit bb266760 authored by Ard Biesheuvel's avatar Ard Biesheuvel Committed by Zheng Zengkai
Browse files

arm-soc: various: replace open coded VA->PA calculation of pen_release

maillist inclusion
commit e2aa765c4eb9bbcdd3046744e6f73050d1175138
category: feature
feature: ARM kaslr support
bugzilla: 47952
CVE: NA

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/ardb/linux.git/commit/?h=arm-kaslr-latest&id=e2aa765c4eb9bbcdd3046744e6f73050d1175138



-------------------------------------------------

This replaces a few copies of the open coded calculations of the
physical address of 'pen_release' in the secondary startup code
of a couple of platforms. This ensures these quantities are invariant
under runtime relocation.

Cc: Russell King <linux@armlinux.org.uk>
Acked-by: default avatarNicolas Pitre <nico@linaro.org>
Signed-off-by: default avatarArd Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: default avatarCui GaoSheng <cuigaosheng1@huawei.com>
Reviewed-by: default avatarXiu Jianfeng <xiujianfeng@huawei.com>
Signed-off-by: default avatarZheng Zengkai <zhengzengkai@huawei.com>
parent 84b54dc2
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+3 −8
Original line number Diff line number Diff line
@@ -8,6 +8,8 @@
#include <linux/linkage.h>
#include <linux/init.h>

#include <asm/assembler.h>

/*
 * SIRFSOC specific entry point for secondary CPUs.  This provides
 * a "holding pen" into which all secondary cores are held until we're
@@ -16,10 +18,7 @@
ENTRY(sirfsoc_secondary_startup)
        mrc     p15, 0, r0, c0, c0, 5
        and     r0, r0, #15
        adr     r4, 1f
        ldmia   r4, {r5, r6}
        sub     r4, r4, r5
        add     r6, r6, r4
        adr_l   r6, prima2_pen_release
pen:    ldr     r7, [r6]
        cmp     r7, r0
        bne     pen
@@ -30,7 +29,3 @@ pen: ldr r7, [r6]
         */
        b       secondary_startup
ENDPROC(sirfsoc_secondary_startup)

        .align
1:      .long   .
        .long   prima2_pen_release
+3 −8
Original line number Diff line number Diff line
@@ -10,6 +10,8 @@
#include <linux/linkage.h>
#include <linux/init.h>

#include <asm/assembler.h>

	__INIT

/*
@@ -20,10 +22,7 @@
ENTRY(spear13xx_secondary_startup)
	mrc	p15, 0, r0, c0, c0, 5
	and	r0, r0, #15
	adr	r4, 1f
	ldmia	r4, {r5, r6}
	sub	r4, r4, r5
	add	r6, r6, r4
	adr_l	r6, spear_pen_release
pen:	ldr	r7, [r6]
	cmp	r7, r0
	bne	pen
@@ -37,8 +36,4 @@ pen: ldr r7, [r6]
	 * should now contain the SVC stack for this core
	 */
	b	secondary_startup

	.align
1:	.long	.
	.long	spear_pen_release
ENDPROC(spear13xx_secondary_startup)
+1 −8
Original line number Diff line number Diff line
@@ -18,10 +18,7 @@ ENTRY(versatile_secondary_startup)
 ARM_BE8(setend	be)
	mrc	p15, 0, r0, c0, c0, 5
	bic	r0, #0xff000000
	adr	r4, 1f
	ldmia	r4, {r5, r6}
	sub	r4, r4, r5
	add	r6, r6, r4
	adr_l	r6, versatile_cpu_release
pen:	ldr	r7, [r6]
	cmp	r7, r0
	bne	pen
@@ -31,8 +28,4 @@ pen: ldr r7, [r6]
	 * should now contain the SVC stack for this core
	 */
	b	secondary_startup

	.align
1:	.long	.
	.long	versatile_cpu_release
ENDPROC(versatile_secondary_startup)