Commit baffc34d authored by Chia-Wei, Wang's avatar Chia-Wei, Wang Committed by Joel Stanley
Browse files

dt-bindings: aspeed-lpc: Remove LPC partitioning 



The LPC controller has no concept of the BMC and the Host partitions.
This patch fixes the documentation by removing the description on LPC
partitions. The register offsets illustrated in the DTS node examples
are also fixed to adapt to the LPC DTS change.

Signed-off-by: default avatarChia-Wei Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: default avatarAndrew Jeffery <andrew@aj.id.au>
Acked-by: default avatarRob Herring <robh@kernel.org>
Acked-by: default avatarLee Jones <lee.jones@linaro.org>
Reviewed-by: default avatarJoel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20210319062752.145730-1-andrew@aj.id.au


Signed-off-by: default avatarJoel Stanley <joel@jms.id.au>
parent a38fd874

Documentation/devicetree/bindings/mfd/aspeed-lpc.txt

+25 −75
Original line number Diff line number Diff line
@@ -9,13 +9,7 @@ primary use case of the Aspeed LPC controller is as a slave on the bus 
conditions it can also take the role of bus master.



The LPC controller is represented as a multi-function device to account for the

mix of functionality it provides. The principle split is between the register

layout at the start of the I/O space which is, to quote the Aspeed datasheet,

"basically compatible with the [LPC registers from the] popular BMC controller

H8S/2168[1]", and everything else, where everything else is an eclectic

collection of functions with a esoteric register layout. "Everything else",

here labeled the "host" portion of the controller, includes, but is not limited

to:

mix of functionality, which includes, but is not limited to:



* An IPMI Block Transfer[2] Controller
@@ -44,9 +38,9 @@ Required properties 
===================



- compatible:	One of:

		"aspeed,ast2400-lpc", "simple-mfd"

		"aspeed,ast2500-lpc", "simple-mfd"

		"aspeed,ast2600-lpc", "simple-mfd"

		"aspeed,ast2400-lpc-v2", "simple-mfd", "syscon"

		"aspeed,ast2500-lpc-v2", "simple-mfd", "syscon"

		"aspeed,ast2600-lpc-v2", "simple-mfd", "syscon"



- reg:		contains the physical address and length values of the Aspeed

                LPC memory region.
@@ -56,68 +50,24 @@ Required properties 
- ranges:	Maps 0 to the physical address and length of the LPC memory

                region



Required LPC Child nodes

========================



BMC Node

--------



- compatible:	One of:

		"aspeed,ast2400-lpc-bmc"

		"aspeed,ast2500-lpc-bmc"

		"aspeed,ast2600-lpc-bmc"



- reg:		contains the physical address and length values of the

                H8S/2168-compatible LPC controller memory region



Host Node

---------



- compatible:   One of:

		"aspeed,ast2400-lpc-host", "simple-mfd", "syscon"

		"aspeed,ast2500-lpc-host", "simple-mfd", "syscon"

		"aspeed,ast2600-lpc-host", "simple-mfd", "syscon"



- reg:		contains the address and length values of the host-related

                register space for the Aspeed LPC controller



- #address-cells: <1>

- #size-cells:	<1>

- ranges: 	Maps 0 to the address and length of the host-related LPC memory

                region



Example:



lpc: lpc@1e789000 {

	compatible = "aspeed,ast2500-lpc", "simple-mfd";

	compatible = "aspeed,ast2500-lpc-v2", "simple-mfd", "syscon";

	reg = <0x1e789000 0x1000>;



	#address-cells = <1>;

	#size-cells = <1>;

	ranges = <0x0 0x1e789000 0x1000>;



	lpc_bmc: lpc-bmc@0 {

		compatible = "aspeed,ast2500-lpc-bmc";

	lpc_snoop: lpc-snoop@0 {

		compatible = "aspeed,ast2600-lpc-snoop";

		reg = <0x0 0x80>;

	};



	lpc_host: lpc-host@80 {

		compatible = "aspeed,ast2500-lpc-host", "simple-mfd", "syscon";

		reg = <0x80 0x1e0>;

		reg-io-width = <4>;



		#address-cells = <1>;

		#size-cells = <1>;

		ranges = <0x0 0x80 0x1e0>;

		interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;

		snoop-ports = <0x80>;

	};

};



BMC Node Children

==================





Host Node Children

==================



LPC Host Interface Controller

-------------------
@@ -149,15 +99,13 @@ Optional properties: 


Example:



lpc-host@80 {

	lpc_ctrl: lpc-ctrl@0 {

lpc_ctrl: lpc-ctrl@80 {

	compatible = "aspeed,ast2500-lpc-ctrl";

		reg = <0x0 0x80>;

	reg = <0x80 0x80>;

	clocks = <&syscon ASPEED_CLK_GATE_LCLK>;

	memory-region = <&flash_memory>;

	flash = <&spi>;

};

};



LPC Host Controller

-------------------
@@ -179,9 +127,9 @@ Required properties: 


Example:



lhc: lhc@20 {

lhc: lhc@a0 {

	compatible = "aspeed,ast2500-lhc";

	reg = <0x20 0x24 0x48 0x8>;

	reg = <0xa0 0x24 0xc8 0x8>;

};



LPC reset control
@@ -192,16 +140,18 @@ state of the LPC bus. Some systems may chose to modify this configuration. 


Required properties:



 - compatible:		"aspeed,ast2600-lpc-reset" or

			"aspeed,ast2500-lpc-reset"

			"aspeed,ast2400-lpc-reset"

 - compatible:		One of:

			"aspeed,ast2600-lpc-reset";

			"aspeed,ast2500-lpc-reset";

			"aspeed,ast2400-lpc-reset";



 - reg:			offset and length of the IP in the LHC memory region

 - #reset-controller	indicates the number of reset cells expected



Example:



lpc_reset: reset-controller@18 {

lpc_reset: reset-controller@98 {

        compatible = "aspeed,ast2500-lpc-reset";

        reg = <0x18 0x4>;

        reg = <0x98 0x4>;

        #reset-cells = <1>;

};