Commit bad610c9 authored by George Shen's avatar George Shen Committed by Alex Deucher
Browse files

drm/amd/display: Fix DCN32 DSC delay calculation 



[Why]
DCN32 DSC delay calculation had an unintentional integer division,
resulting in a mismatch against the DML spreadsheet.

[How]
Cast numerator to double before performing the division.

Reviewed-by: default avatarAlvin Lee <Alvin.Lee2@amd.com>
Acked-by: default avatarAlex Hung <alex.hung@amd.com>
Signed-off-by: default avatarGeorge Shen <george.shen@amd.com>
Tested-by: default avatarMark Broadworth <mark.broadworth@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 8fe8ce89

drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c

+1 −1
Original line number Diff line number Diff line
@@ -1746,7 +1746,7 @@ unsigned int dml32_DSCDelayRequirement(bool DSCEnabled, 
		}



		DSCDelayRequirement_val = DSCDelayRequirement_val + (HTotal - HActive) *

				dml_ceil(DSCDelayRequirement_val / HActive, 1);

				dml_ceil((double)DSCDelayRequirement_val / HActive, 1);



		DSCDelayRequirement_val = DSCDelayRequirement_val * PixelClock / PixelClockBackEnd;