Commit ba805be5 authored by Nishanth Menon's avatar Nishanth Menon Committed by Tarun Kanti DebBarma
Browse files

gpio/omap: enable irq at the end of all configuration in restore 



Setup the interrupt enable registers only after we have configured the
required edge and required configurations, not before, to prevent
spurious events as part of restore routine.

Signed-off-by: default avatarNishanth Menon <nm@ti.com>
Signed-off-by: default avatarTarun Kanti DebBarma <tarun.kanti@ti.com>
Reviewed-by: default avatarSantosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: default avatarKevin Hilman <khilman@ti.com>
Signed-off-by: default avatarKevin Hilman <khilman@ti.com>
parent ae547354

drivers/gpio/gpio-omap.c

+5 −4
Original line number Diff line number Diff line
@@ -1352,10 +1352,6 @@ void omap2_gpio_resume_after_idle(void) 
#if defined(CONFIG_PM_RUNTIME)

static void omap_gpio_restore_context(struct gpio_bank *bank)

{

	__raw_writel(bank->context.irqenable1,

				bank->base + bank->regs->irqenable);

	__raw_writel(bank->context.irqenable2,

				bank->base + bank->regs->irqenable2);

	__raw_writel(bank->context.wake_en,

				bank->base + bank->regs->wkup_en);

	__raw_writel(bank->context.ctrl, bank->base + bank->regs->ctrl);
@@ -1375,6 +1371,11 @@ static void omap_gpio_restore_context(struct gpio_bank *bank) 
		__raw_writel(bank->context.debounce_en,

					bank->base + bank->regs->debounce_en);

	}



	__raw_writel(bank->context.irqenable1,

				bank->base + bank->regs->irqenable);

	__raw_writel(bank->context.irqenable2,

				bank->base + bank->regs->irqenable2);

}

#endif /* CONFIG_PM_RUNTIME */

#else