Commit ba0ad6ed authored by Arnd Bergmann's avatar Arnd Bergmann Committed by Linus Torvalds
Browse files

media: nxp: imx8-isi: fix buiding on 32-bit 



The #if check is wrong, leading to a build failure:

  drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c: In function 'mxc_isi_channel_set_inbuf':
  drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c:33:5: error: "CONFIG_ARCH_DMA_ADDR_T_64BIT" is not defined, evaluates to 0 [-Werror=undef]
     33 | #if CONFIG_ARCH_DMA_ADDR_T_64BIT
        |     ^~~~~~~~~~~~~~~~~~~~~~~~~~~~

This could just be an #ifdef, but it seems nicer to just remove the
check entirely.  Apparently the only reason for the #ifdef is to avoid
another warning:

  drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c:55:24: error: right shift count >= width of type [-Werror=shift-count-overflow]

But this is best avoided by using the lower_32_bits()/upper_32_bits()
helpers.

Fixes: cf21f328 ("media: nxp: Add i.MX8 ISI driver")
Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
Reviewed-by: default avatarLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: default avatarLinus Torvalds <torvalds@linux-foundation.org>
parent ac9a7868

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

+21 −20
Original line number Diff line number Diff line
@@ -29,11 +29,10 @@ static inline void mxc_isi_write(struct mxc_isi_pipe *pipe, u32 reg, u32 val) 


void mxc_isi_channel_set_inbuf(struct mxc_isi_pipe *pipe, dma_addr_t dma_addr)

{

	mxc_isi_write(pipe, CHNL_IN_BUF_ADDR, dma_addr);

#if CONFIG_ARCH_DMA_ADDR_T_64BIT

	mxc_isi_write(pipe, CHNL_IN_BUF_ADDR, lower_32_bits(dma_addr));

	if (pipe->isi->pdata->has_36bit_dma)

		mxc_isi_write(pipe, CHNL_IN_BUF_XTND_ADDR, dma_addr >> 32);

#endif

		mxc_isi_write(pipe, CHNL_IN_BUF_XTND_ADDR,

			      upper_32_bits(dma_addr));

}



void mxc_isi_channel_set_outbuf(struct mxc_isi_pipe *pipe,
@@ -45,34 +44,36 @@ void mxc_isi_channel_set_outbuf(struct mxc_isi_pipe *pipe, 
	val = mxc_isi_read(pipe, CHNL_OUT_BUF_CTRL);



	if (buf_id == MXC_ISI_BUF1) {

		mxc_isi_write(pipe, CHNL_OUT_BUF1_ADDR_Y, dma_addrs[0]);

		mxc_isi_write(pipe, CHNL_OUT_BUF1_ADDR_U, dma_addrs[1]);

		mxc_isi_write(pipe, CHNL_OUT_BUF1_ADDR_V, dma_addrs[2]);

#if CONFIG_ARCH_DMA_ADDR_T_64BIT

		mxc_isi_write(pipe, CHNL_OUT_BUF1_ADDR_Y,

			      lower_32_bits(dma_addrs[0]));

		mxc_isi_write(pipe, CHNL_OUT_BUF1_ADDR_U,

			      lower_32_bits(dma_addrs[1]));

		mxc_isi_write(pipe, CHNL_OUT_BUF1_ADDR_V,

			      lower_32_bits(dma_addrs[2]));

		if (pipe->isi->pdata->has_36bit_dma) {

			mxc_isi_write(pipe, CHNL_Y_BUF1_XTND_ADDR,

				      dma_addrs[0] >> 32);

				      upper_32_bits(dma_addrs[0]));

			mxc_isi_write(pipe, CHNL_U_BUF1_XTND_ADDR,

				      dma_addrs[1] >> 32);

				      upper_32_bits(dma_addrs[1]));

			mxc_isi_write(pipe, CHNL_V_BUF1_XTND_ADDR,

				      dma_addrs[2] >> 32);

				      upper_32_bits(dma_addrs[2]));

		}

#endif

		val ^= CHNL_OUT_BUF_CTRL_LOAD_BUF1_ADDR;

	} else  {

		mxc_isi_write(pipe, CHNL_OUT_BUF2_ADDR_Y, dma_addrs[0]);

		mxc_isi_write(pipe, CHNL_OUT_BUF2_ADDR_U, dma_addrs[1]);

		mxc_isi_write(pipe, CHNL_OUT_BUF2_ADDR_V, dma_addrs[2]);

#if CONFIG_ARCH_DMA_ADDR_T_64BIT

		mxc_isi_write(pipe, CHNL_OUT_BUF2_ADDR_Y,

			      lower_32_bits(dma_addrs[0]));

		mxc_isi_write(pipe, CHNL_OUT_BUF2_ADDR_U,

			      lower_32_bits(dma_addrs[1]));

		mxc_isi_write(pipe, CHNL_OUT_BUF2_ADDR_V,

			      lower_32_bits(dma_addrs[2]));

		if (pipe->isi->pdata->has_36bit_dma) {

			mxc_isi_write(pipe, CHNL_Y_BUF2_XTND_ADDR,

				      dma_addrs[0] >> 32);

				      upper_32_bits(dma_addrs[0]));

			mxc_isi_write(pipe, CHNL_U_BUF2_XTND_ADDR,

				      dma_addrs[1] >> 32);

				      upper_32_bits(dma_addrs[1]));

			mxc_isi_write(pipe, CHNL_V_BUF2_XTND_ADDR,

				      dma_addrs[2] >> 32);

				      upper_32_bits(dma_addrs[2]));

		}

#endif

		val ^= CHNL_OUT_BUF_CTRL_LOAD_BUF2_ADDR;

	}