Loading drivers/gpu/drm/nouveau/nvkm/engine/device/base.c +2 −0 Original line number Diff line number Diff line Loading @@ -2608,6 +2608,7 @@ nv167_chipset = { .disp = tu102_disp_new, .dma = gv100_dma_new, .fifo = tu102_fifo_new, .gr = tu102_gr_new, .nvdec[0] = gm107_nvdec_new, .nvenc[0] = gm107_nvenc_new, .sec2 = tu102_sec2_new, Loading Loading @@ -2645,6 +2646,7 @@ nv168_chipset = { .disp = tu102_disp_new, .dma = gv100_dma_new, .fifo = tu102_fifo_new, .gr = tu102_gr_new, .nvdec[0] = gm107_nvdec_new, .nvenc[0] = gm107_nvenc_new, .sec2 = tu102_sec2_new, Loading drivers/gpu/drm/nouveau/nvkm/engine/gr/tu102.c +26 −0 Original line number Diff line number Diff line Loading @@ -164,6 +164,32 @@ MODULE_FIRMWARE("nvidia/tu106/gr/sw_nonctx.bin"); MODULE_FIRMWARE("nvidia/tu106/gr/sw_bundle_init.bin"); MODULE_FIRMWARE("nvidia/tu106/gr/sw_method_init.bin"); MODULE_FIRMWARE("nvidia/tu117/gr/fecs_bl.bin"); MODULE_FIRMWARE("nvidia/tu117/gr/fecs_inst.bin"); MODULE_FIRMWARE("nvidia/tu117/gr/fecs_data.bin"); MODULE_FIRMWARE("nvidia/tu117/gr/fecs_sig.bin"); MODULE_FIRMWARE("nvidia/tu117/gr/gpccs_bl.bin"); MODULE_FIRMWARE("nvidia/tu117/gr/gpccs_inst.bin"); MODULE_FIRMWARE("nvidia/tu117/gr/gpccs_data.bin"); MODULE_FIRMWARE("nvidia/tu117/gr/gpccs_sig.bin"); MODULE_FIRMWARE("nvidia/tu117/gr/sw_ctx.bin"); MODULE_FIRMWARE("nvidia/tu117/gr/sw_nonctx.bin"); MODULE_FIRMWARE("nvidia/tu117/gr/sw_bundle_init.bin"); MODULE_FIRMWARE("nvidia/tu117/gr/sw_method_init.bin"); MODULE_FIRMWARE("nvidia/tu116/gr/fecs_bl.bin"); MODULE_FIRMWARE("nvidia/tu116/gr/fecs_inst.bin"); MODULE_FIRMWARE("nvidia/tu116/gr/fecs_data.bin"); MODULE_FIRMWARE("nvidia/tu116/gr/fecs_sig.bin"); MODULE_FIRMWARE("nvidia/tu116/gr/gpccs_bl.bin"); MODULE_FIRMWARE("nvidia/tu116/gr/gpccs_inst.bin"); MODULE_FIRMWARE("nvidia/tu116/gr/gpccs_data.bin"); MODULE_FIRMWARE("nvidia/tu116/gr/gpccs_sig.bin"); MODULE_FIRMWARE("nvidia/tu116/gr/sw_ctx.bin"); MODULE_FIRMWARE("nvidia/tu116/gr/sw_nonctx.bin"); MODULE_FIRMWARE("nvidia/tu116/gr/sw_bundle_init.bin"); MODULE_FIRMWARE("nvidia/tu116/gr/sw_method_init.bin"); static const struct gf100_gr_fwif tu102_gr_fwif[] = { { 0, gm200_gr_load, &tu102_gr, &gp108_gr_fecs_acr, &gp108_gr_gpccs_acr }, Loading Loading
drivers/gpu/drm/nouveau/nvkm/engine/device/base.c +2 −0 Original line number Diff line number Diff line Loading @@ -2608,6 +2608,7 @@ nv167_chipset = { .disp = tu102_disp_new, .dma = gv100_dma_new, .fifo = tu102_fifo_new, .gr = tu102_gr_new, .nvdec[0] = gm107_nvdec_new, .nvenc[0] = gm107_nvenc_new, .sec2 = tu102_sec2_new, Loading Loading @@ -2645,6 +2646,7 @@ nv168_chipset = { .disp = tu102_disp_new, .dma = gv100_dma_new, .fifo = tu102_fifo_new, .gr = tu102_gr_new, .nvdec[0] = gm107_nvdec_new, .nvenc[0] = gm107_nvenc_new, .sec2 = tu102_sec2_new, Loading
drivers/gpu/drm/nouveau/nvkm/engine/gr/tu102.c +26 −0 Original line number Diff line number Diff line Loading @@ -164,6 +164,32 @@ MODULE_FIRMWARE("nvidia/tu106/gr/sw_nonctx.bin"); MODULE_FIRMWARE("nvidia/tu106/gr/sw_bundle_init.bin"); MODULE_FIRMWARE("nvidia/tu106/gr/sw_method_init.bin"); MODULE_FIRMWARE("nvidia/tu117/gr/fecs_bl.bin"); MODULE_FIRMWARE("nvidia/tu117/gr/fecs_inst.bin"); MODULE_FIRMWARE("nvidia/tu117/gr/fecs_data.bin"); MODULE_FIRMWARE("nvidia/tu117/gr/fecs_sig.bin"); MODULE_FIRMWARE("nvidia/tu117/gr/gpccs_bl.bin"); MODULE_FIRMWARE("nvidia/tu117/gr/gpccs_inst.bin"); MODULE_FIRMWARE("nvidia/tu117/gr/gpccs_data.bin"); MODULE_FIRMWARE("nvidia/tu117/gr/gpccs_sig.bin"); MODULE_FIRMWARE("nvidia/tu117/gr/sw_ctx.bin"); MODULE_FIRMWARE("nvidia/tu117/gr/sw_nonctx.bin"); MODULE_FIRMWARE("nvidia/tu117/gr/sw_bundle_init.bin"); MODULE_FIRMWARE("nvidia/tu117/gr/sw_method_init.bin"); MODULE_FIRMWARE("nvidia/tu116/gr/fecs_bl.bin"); MODULE_FIRMWARE("nvidia/tu116/gr/fecs_inst.bin"); MODULE_FIRMWARE("nvidia/tu116/gr/fecs_data.bin"); MODULE_FIRMWARE("nvidia/tu116/gr/fecs_sig.bin"); MODULE_FIRMWARE("nvidia/tu116/gr/gpccs_bl.bin"); MODULE_FIRMWARE("nvidia/tu116/gr/gpccs_inst.bin"); MODULE_FIRMWARE("nvidia/tu116/gr/gpccs_data.bin"); MODULE_FIRMWARE("nvidia/tu116/gr/gpccs_sig.bin"); MODULE_FIRMWARE("nvidia/tu116/gr/sw_ctx.bin"); MODULE_FIRMWARE("nvidia/tu116/gr/sw_nonctx.bin"); MODULE_FIRMWARE("nvidia/tu116/gr/sw_bundle_init.bin"); MODULE_FIRMWARE("nvidia/tu116/gr/sw_method_init.bin"); static const struct gf100_gr_fwif tu102_gr_fwif[] = { { 0, gm200_gr_load, &tu102_gr, &gp108_gr_fecs_acr, &gp108_gr_gpccs_acr }, Loading