Commit b96fbb03 authored by Konrad Dybcio's avatar Konrad Dybcio Committed by Bjorn Andersson
Browse files

clk: qcom: branch: Clean up branch enable registers 



Prefix the "branch enable" registers with CBCR_ to be closer to what
they are actually called in Qualcomm terms, use GENMASK instead of
shifting values around and adjust their usage accordingly.

Signed-off-by: default avatarKonrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230208091340.124641-5-konrad.dybcio@linaro.org
parent 5ab6561d

drivers/clk/qcom/clk-branch.c

+5 −5
Original line number Diff line number Diff line
@@ -44,17 +44,17 @@ static bool clk_branch2_check_halt(const struct clk_branch *br, bool enabling) 
	u32 val;

	u32 mask;



	mask = BRANCH_NOC_FSM_STATUS_MASK << BRANCH_NOC_FSM_STATUS_SHIFT;

	mask |= BRANCH_CLK_OFF;

	mask = CBCR_NOC_FSM_STATUS;

	mask |= CBCR_CLK_OFF;



	regmap_read(br->clkr.regmap, br->halt_reg, &val);



	if (enabling) {

		val &= mask;

		return (val & BRANCH_CLK_OFF) == 0 ||

			val == BRANCH_NOC_FSM_STATUS_ON;

		return (val & CBCR_CLK_OFF) == 0 ||

			FIELD_GET(CBCR_NOC_FSM_STATUS, val) == FSM_STATUS_ON;

	} else {

		return val & BRANCH_CLK_OFF;

		return val & CBCR_CLK_OFF;

	}

}

drivers/clk/qcom/clk-branch.h

+3 −4
Original line number Diff line number Diff line
@@ -39,10 +39,9 @@ struct clk_branch { 
};



/* Branch clock common bits for HLOS-owned clocks */

#define BRANCH_CLK_OFF			BIT(31)

#define BRANCH_NOC_FSM_STATUS_SHIFT	28

#define BRANCH_NOC_FSM_STATUS_MASK	0x7

#define BRANCH_NOC_FSM_STATUS_ON	(0x2 << BRANCH_NOC_FSM_STATUS_SHIFT)

#define CBCR_CLK_OFF			BIT(31)

#define CBCR_NOC_FSM_STATUS		GENMASK(30, 28)

 #define FSM_STATUS_ON			BIT(1)

#define CBCR_FORCE_MEM_CORE_ON		BIT(14)

#define CBCR_FORCE_MEM_PERIPH_ON	BIT(13)

#define CBCR_FORCE_MEM_PERIPH_OFF	BIT(12)