Commit b94e805d authored by wanghongliang's avatar wanghongliang Committed by Hongchen Zhang
Browse files

LoongArch: fix i2c related issues 

LoongArch inclusion
category: feature
bugzilla: https://gitee.com/openeuler/kernel/issues/IBENRY


CVE: NA

--------------------------------

Signed-off-by: default avatarwanghongliang <wanghongliang@loongson.cn>
parent f31e5ff0

arch/loongarch/configs/loongson3_defconfig

+2 −0
Original line number Diff line number Diff line
@@ -1673,6 +1673,8 @@ CONFIG_HID_ALPS=m 
CONFIG_HID_PID=y

CONFIG_USB_HIDDEV=y

CONFIG_I2C_HID=m

CONFIG_I2C_HID_ACPI=m

CONFIG_I2C_HID_OF=m

CONFIG_USB_LED_TRIG=y

CONFIG_USB=y

CONFIG_USB_ANNOUNCE_NEW_DEVICES=y

drivers/gpio/Kconfig

+1 −1
Original line number Diff line number Diff line
@@ -396,7 +396,7 @@ config GPIO_LOONGSON 


config GPIO_LOONGSON_64BIT

	tristate "Loongson 64 bit GPIO support"

	depends on LOONGARCH || COMPILE_TEST

	depends on LOONGARCH || (64BIT && COMPILE_TEST)

	depends on OF_GPIO

	select GPIO_GENERIC

	help

drivers/gpio/gpio-loongson-64bit.c

+257 −41
Original line number Diff line number Diff line
@@ -26,6 +26,7 @@ struct loongson_gpio_chip_data { 
	unsigned int		conf_offset;

	unsigned int		out_offset;

	unsigned int		in_offset;

	unsigned int		inten_offset;

};



struct loongson_gpio_chip {
@@ -33,6 +34,8 @@ struct loongson_gpio_chip { 
	struct fwnode_handle	*fwnode;

	spinlock_t		lock;

	void __iomem		*reg_base;

	u16			*gsi_idx_map;

	u16			mapsize;

	const struct loongson_gpio_chip_data *chip_data;

};
@@ -41,15 +44,40 @@ static inline struct loongson_gpio_chip *to_loongson_gpio_chip(struct gpio_chip 
	return container_of(chip, struct loongson_gpio_chip, chip);

}



static inline void loongson_commit_direction(struct loongson_gpio_chip *lgpio, unsigned int pin,

					     int input)

static inline void loongson_commit_direction_bit(struct loongson_gpio_chip *lgpio,

						unsigned int pin, int input)

{

	u64 temp;



	temp = readq(lgpio->reg_base + lgpio->chip_data->conf_offset);

	if (input)

		temp |= 1ULL << pin;

	else

		temp &= ~(1ULL << pin);

	writeq(temp, lgpio->reg_base + lgpio->chip_data->conf_offset);

}



static inline void loongson_commit_direction_byte(struct loongson_gpio_chip *lgpio,

						unsigned int pin, int input)

{

	u8 bval = input ? 1 : 0;



	writeb(bval, lgpio->reg_base + lgpio->chip_data->conf_offset + pin);

}



static void loongson_commit_level(struct loongson_gpio_chip *lgpio, unsigned int pin, int high)

static void loongson_commit_level_bit(struct loongson_gpio_chip *lgpio, unsigned int pin, int high)

{

	u64 temp;



	temp = readq(lgpio->reg_base + lgpio->chip_data->out_offset);

	if (high)

		temp |= 1ULL << pin;

	else

		temp &= ~(1ULL << pin);

	writeq(temp, lgpio->reg_base + lgpio->chip_data->out_offset);

}



static void loongson_commit_level_byte(struct loongson_gpio_chip *lgpio, unsigned int pin, int high)

{

	u8 bval = high ? 1 : 0;
@@ -62,7 +90,10 @@ static int loongson_gpio_direction_input(struct gpio_chip *chip, unsigned int pi 
	struct loongson_gpio_chip *lgpio = to_loongson_gpio_chip(chip);



	spin_lock_irqsave(&lgpio->lock, flags);

	loongson_commit_direction(lgpio, pin, 1);

	if (lgpio->chip_data->mode == BIT_CTRL_MODE)

		loongson_commit_direction_bit(lgpio, pin, 1);

	else

		loongson_commit_direction_byte(lgpio, pin, 1);

	spin_unlock_irqrestore(&lgpio->lock, flags);



	return 0;
@@ -74,8 +105,13 @@ static int loongson_gpio_direction_output(struct gpio_chip *chip, unsigned int p 
	struct loongson_gpio_chip *lgpio = to_loongson_gpio_chip(chip);



	spin_lock_irqsave(&lgpio->lock, flags);

	loongson_commit_level(lgpio, pin, value);

	loongson_commit_direction(lgpio, pin, 0);

	if (lgpio->chip_data->mode == BIT_CTRL_MODE) {

		loongson_commit_level_bit(lgpio, pin, value);

		loongson_commit_direction_bit(lgpio, pin, 0);

	} else {

		loongson_commit_level_byte(lgpio, pin, value);

		loongson_commit_direction_byte(lgpio, pin, 0);

	}

	spin_unlock_irqrestore(&lgpio->lock, flags);



	return 0;
@@ -84,11 +120,17 @@ static int loongson_gpio_direction_output(struct gpio_chip *chip, unsigned int p 
static int loongson_gpio_get(struct gpio_chip *chip, unsigned int pin)

{

	u8  bval;

	u64 qval;

	int val;

	struct loongson_gpio_chip *lgpio = to_loongson_gpio_chip(chip);



	if (lgpio->chip_data->mode == BIT_CTRL_MODE) {

		qval = readq(lgpio->reg_base + lgpio->chip_data->in_offset);

		val = ((qval & (1ULL << pin)) != 0);

	} else {

		bval = readb(lgpio->reg_base + lgpio->chip_data->in_offset + pin);

	val = bval & 1;

		val = (bval & 1);

	}



	return val;

}
@@ -96,13 +138,22 @@ static int loongson_gpio_get(struct gpio_chip *chip, unsigned int pin) 
static int loongson_gpio_get_direction(struct gpio_chip *chip, unsigned int pin)

{

	u8  bval;

	u64 qval;

	int val;

	struct loongson_gpio_chip *lgpio = to_loongson_gpio_chip(chip);



	if (lgpio->chip_data->mode == BIT_CTRL_MODE) {

		qval = readq(lgpio->reg_base + lgpio->chip_data->conf_offset);

		val = ((qval & (1ULL << pin)) != 0);

	} else {

		bval = readb(lgpio->reg_base + lgpio->chip_data->conf_offset + pin);

	if (bval & 1)

		return GPIO_LINE_DIRECTION_IN;

		val = bval & 1;

	}



	return GPIO_LINE_DIRECTION_OUT;

	if (val)

		return 1;



	return 0;

}



static void loongson_gpio_set(struct gpio_chip *chip, unsigned int pin, int value)
@@ -111,51 +162,72 @@ static void loongson_gpio_set(struct gpio_chip *chip, unsigned int pin, int valu 
	struct loongson_gpio_chip *lgpio = to_loongson_gpio_chip(chip);



	spin_lock_irqsave(&lgpio->lock, flags);

	loongson_commit_level(lgpio, pin, value);

	if (lgpio->chip_data->mode == BIT_CTRL_MODE)

		loongson_commit_level_bit(lgpio, pin, value);

	else

		loongson_commit_level_byte(lgpio, pin, value);

	spin_unlock_irqrestore(&lgpio->lock, flags);

}



static int loongson_gpio_to_irq(struct gpio_chip *chip, unsigned int offset)

{

	unsigned int u;

	struct platform_device *pdev = to_platform_device(chip->parent);

	struct loongson_gpio_chip *lgpio = to_loongson_gpio_chip(chip);



	if (lgpio->chip_data->mode == BIT_CTRL_MODE) {

		/* Get the register index from offset then multiply by bytes per register */

		u = readl(lgpio->reg_base + lgpio->chip_data->inten_offset + (offset / 32) * 4);

		u |= BIT(offset % 32);

		writel(u, lgpio->reg_base + lgpio->chip_data->inten_offset + (offset / 32) * 4);

	} else {

		writeb(1, lgpio->reg_base + lgpio->chip_data->inten_offset + offset);

	}



	if ((lgpio->gsi_idx_map != NULL) && (offset < lgpio->mapsize))

		offset = lgpio->gsi_idx_map[offset];



	return platform_get_irq(pdev, offset);

}



static int loongson_gpio_init(struct device *dev, struct loongson_gpio_chip *lgpio,

			      struct device_node *np, void __iomem *reg_base)

			      void __iomem *reg_base)

{

	int ret;

	u32 ngpios;

	u32 gpio_base;

	int rval;



	lgpio->reg_base = reg_base;



	if (lgpio->chip_data->mode == BIT_CTRL_MODE) {

		ret = bgpio_init(&lgpio->chip, dev, 8,

				lgpio->reg_base + lgpio->chip_data->in_offset,

				lgpio->reg_base + lgpio->chip_data->out_offset,

				NULL, NULL,

				lgpio->reg_base + lgpio->chip_data->conf_offset,

				0);

		if (ret) {

			dev_err(dev, "unable to init generic GPIO\n");

			return ret;

		}

	} else {

	lgpio->chip.direction_input = loongson_gpio_direction_input;

	lgpio->chip.get = loongson_gpio_get;

	lgpio->chip.get_direction = loongson_gpio_get_direction;

	lgpio->chip.direction_output = loongson_gpio_direction_output;

	lgpio->chip.set = loongson_gpio_set;

	lgpio->chip.parent = dev;

		spin_lock_init(&lgpio->lock);

	}



	device_property_read_u32(dev, "gpio_base", &gpio_base);

	if (!gpio_base)

		gpio_base = -1;

	lgpio->chip.base = gpio_base;

	device_property_read_u32(dev, "ngpios", &ngpios);



	lgpio->chip.can_sleep = 0;

	lgpio->chip.ngpio = ngpios;

	rval = device_property_read_u16_array(dev, "gsi_idx_map", NULL, 0);

	if (rval > 0) {

		lgpio->gsi_idx_map =

			kmalloc_array(rval, sizeof(*lgpio->gsi_idx_map),

					GFP_KERNEL);

		if (unlikely(!lgpio->gsi_idx_map)) {

			dev_err(dev, "Alloc gsi_idx_map fail!\n");

		} else {

			lgpio->mapsize = rval;

			device_property_read_u16_array(dev, "gsi_idx_map",

					lgpio->gsi_idx_map, lgpio->mapsize);

		}

	}

	spin_lock_init(&lgpio->lock);



	lgpio->chip.label = lgpio->chip_data->label;

	lgpio->chip.can_sleep = false;

	if (lgpio->chip_data->inten_offset)

		lgpio->chip.to_irq = loongson_gpio_to_irq;



	return devm_gpiochip_add_data(dev, &lgpio->chip, lgpio);
@@ -165,7 +237,6 @@ static int loongson_gpio_probe(struct platform_device *pdev) 
{

	void __iomem *reg_base;

	struct loongson_gpio_chip *lgpio;

	struct device_node *np = pdev->dev.of_node;

	struct device *dev = &pdev->dev;



	lgpio = devm_kzalloc(dev, sizeof(*lgpio), GFP_KERNEL);
@@ -178,7 +249,7 @@ static int loongson_gpio_probe(struct platform_device *pdev) 
	if (IS_ERR(reg_base))

		return PTR_ERR(reg_base);



	return loongson_gpio_init(dev, lgpio, np, reg_base);

	return loongson_gpio_init(dev, lgpio, reg_base);

}



static const struct loongson_gpio_chip_data loongson_gpio_ls2k_data = {
@@ -187,6 +258,60 @@ static const struct loongson_gpio_chip_data loongson_gpio_ls2k_data = { 
	.conf_offset = 0x0,

	.in_offset = 0x20,

	.out_offset = 0x10,

	.inten_offset = 0x30,

};



static const struct loongson_gpio_chip_data loongson_gpio_ls2k0500_data0 = {

	.label = "ls2k0500_gpio",

	.mode = BIT_CTRL_MODE,

	.conf_offset = 0x0,

	.in_offset = 0x8,

	.out_offset = 0x10,

	.inten_offset = 0xb0,

};



static const struct loongson_gpio_chip_data loongson_gpio_ls2k0500_data1 = {

	.label = "ls2k0500_gpio",

	.mode = BIT_CTRL_MODE,

	.conf_offset = 0x0,

	.in_offset = 0x8,

	.out_offset = 0x10,

	.inten_offset = 0x98,

};



static const struct loongson_gpio_chip_data loongson_gpio_ls2k2000_data0 = {

	.label = "ls2k2000_gpio",

	.mode = BIT_CTRL_MODE,

	.conf_offset = 0x0,

	.in_offset = 0xc,

	.out_offset = 0x8,

	.inten_offset = 0x14,

};



static const struct loongson_gpio_chip_data loongson_gpio_ls2k2000_data1 = {

	.label = "ls2k2000_gpio",

	.mode = BIT_CTRL_MODE,

	.conf_offset = 0x0,

	.in_offset = 0x20,

	.out_offset = 0x10,

	.inten_offset = 0x30,

};



static const struct loongson_gpio_chip_data loongson_gpio_ls2k2000_data2 = {

	.label = "ls2k2000_gpio",

	.mode = BIT_CTRL_MODE,

	.conf_offset = 0x4,

	.in_offset = 0x8,

	.out_offset = 0x0,

};



static const struct loongson_gpio_chip_data loongson_gpio_ls3a5000_data = {

	.label = "ls3a5000_gpio",

	.mode = BIT_CTRL_MODE,

	.conf_offset = 0x0,

	.in_offset = 0xc,

	.out_offset = 0x8,

	.inten_offset = 0x14,

};



static const struct loongson_gpio_chip_data loongson_gpio_ls7a_data = {
@@ -195,6 +320,33 @@ static const struct loongson_gpio_chip_data loongson_gpio_ls7a_data = { 
	.conf_offset = 0x800,

	.in_offset = 0xa00,

	.out_offset = 0x900,

	.inten_offset = 0xb00,

};



static const struct loongson_gpio_chip_data loongson_gpio_ls7a2000_data0 = {

	.label = "ls7a2000_gpio",

	.mode = BYTE_CTRL_MODE,

	.conf_offset = 0x800,

	.in_offset = 0xa00,

	.out_offset = 0x900,

	.inten_offset = 0xb00,

};



static const struct loongson_gpio_chip_data loongson_gpio_ls7a2000_data1 = {

	.label = "ls7a2000_gpio",

	.mode = BYTE_CTRL_MODE,

	.conf_offset = 0x84,

	.in_offset = 0x88,

	.out_offset = 0x80,

};



static const struct loongson_gpio_chip_data loongson_gpio_ls3a6000_data = {

	.label = "ls3a6000_gpio",

	.mode = BIT_CTRL_MODE,

	.conf_offset = 0x0,

	.in_offset = 0xc,

	.out_offset = 0x8,

	.inten_offset = 0x14,

};



static const struct of_device_id loongson_gpio_of_match[] = {
@@ -202,10 +354,46 @@ static const struct of_device_id loongson_gpio_of_match[] = { 
		.compatible = "loongson,ls2k-gpio",

		.data = &loongson_gpio_ls2k_data,

	},

	{

		.compatible = "loongson,ls2k0500-gpio0",

		.data = &loongson_gpio_ls2k0500_data0,

	},

	{

		.compatible = "loongson,ls2k0500-gpio1",

		.data = &loongson_gpio_ls2k0500_data1,

	},

	{

		.compatible = "loongson,ls2k2000-gpio0",

		.data = &loongson_gpio_ls2k2000_data0,

	},

	{

		.compatible = "loongson,ls2k2000-gpio1",

		.data = &loongson_gpio_ls2k2000_data1,

	},

	{

		.compatible = "loongson,ls2k2000-gpio2",

		.data = &loongson_gpio_ls2k2000_data2,

	},

	{

		.compatible = "loongson,ls3a5000-gpio",

		.data = &loongson_gpio_ls3a5000_data,

	},

	{

		.compatible = "loongson,ls7a-gpio",

		.data = &loongson_gpio_ls7a_data,

	},

	{

		.compatible = "loongson,ls7a2000-gpio1",

		.data = &loongson_gpio_ls7a2000_data0,

	},

	{

		.compatible = "loongson,ls7a2000-gpio2",

		.data = &loongson_gpio_ls7a2000_data1,

	},

	{

		.compatible = "loongson,ls3a6000-gpio",

		.data = &loongson_gpio_ls3a6000_data,

	},

	{}

};

MODULE_DEVICE_TABLE(of, loongson_gpio_of_match);
@@ -215,6 +403,34 @@ static const struct acpi_device_id loongson_gpio_acpi_match[] = { 
		.id = "LOON0002",

		.driver_data = (kernel_ulong_t)&loongson_gpio_ls7a_data,

	},

	{

		.id = "LOON0007",

		.driver_data = (kernel_ulong_t)&loongson_gpio_ls3a5000_data,

	},

	{

		.id = "LOON000A",

		.driver_data = (kernel_ulong_t)&loongson_gpio_ls2k2000_data0,

	},

	{

		.id = "LOON000B",

		.driver_data = (kernel_ulong_t)&loongson_gpio_ls2k2000_data1,

	},

	{

		.id = "LOON000C",

		.driver_data = (kernel_ulong_t)&loongson_gpio_ls2k2000_data2,

	},

	{

		.id = "LOON000D",

		.driver_data = (kernel_ulong_t)&loongson_gpio_ls7a2000_data0,

	},

	{

		.id = "LOON000E",

		.driver_data = (kernel_ulong_t)&loongson_gpio_ls7a2000_data1,

	},

	{

		.id = "LOON000F",

		.driver_data = (kernel_ulong_t)&loongson_gpio_ls3a6000_data,

	},

	{}

};

MODULE_DEVICE_TABLE(acpi, loongson_gpio_acpi_match);

drivers/i2c/busses/i2c-ls2x.c

+8 −4
Original line number Diff line number Diff line
@@ -26,7 +26,8 @@ 
#include <linux/units.h>



/* I2C Registers */

#define I2C_LS2X_PRER		0x0 /* Freq Division Register(16 bits) */

#define I2C_LS2X_PRER_LO	0x0 /* Freq Division Register Lo(8 bits) */

#define I2C_LS2X_PRER_HI	0x1 /* Freq Division Register Hi(8 bits) */

#define I2C_LS2X_CTR		0x2 /* Control Register */

#define I2C_LS2X_TXR		0x3 /* Transport Data Register */

#define I2C_LS2X_RXR		0x3 /* Receive Data Register */
@@ -96,6 +97,7 @@ static void ls2x_i2c_adjust_bus_speed(struct ls2x_i2c_priv *priv) 
	struct i2c_timings *t = &priv->i2c_t;

	struct device *dev = priv->adapter.dev.parent;

	u32 acpi_speed = i2c_acpi_find_bus_speed(dev);

	u16 prer_val;



	i2c_parse_fw_timings(dev, t, false);
@@ -104,9 +106,11 @@ static void ls2x_i2c_adjust_bus_speed(struct ls2x_i2c_priv *priv) 
	else

		t->bus_freq_hz = LS2X_I2C_FREQ_STD;



	/* Calculate and set i2c frequency. */

	writew(LS2X_I2C_PCLK_FREQ / (5 * t->bus_freq_hz) - 1,

	       priv->base + I2C_LS2X_PRER);

	prer_val = LS2X_I2C_PCLK_FREQ / (5 * t->bus_freq_hz) - 1;



	/* set i2c frequency. */

	writeb(prer_val & 0xFF, priv->base + I2C_LS2X_PRER_LO);

	writeb((prer_val & 0xFF00) >> 8, priv->base + I2C_LS2X_PRER_HI);

}



static void ls2x_i2c_init(struct ls2x_i2c_priv *priv)