Commit b92143d4 authored by Russell King (Oracle)'s avatar Russell King (Oracle) Committed by David S. Miller
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net: dsa: mv88e6xxx: add infrastructure for phylink_pcs



Add infrastructure for phylink_pcs to the mv88e6xxx driver. This
involves adding a mac_select_pcs() hook so we can pass the PCS to
phylink at the appropriate time, and a PCS initialisation function.

As the various chip implementations are converted to use phylink_pcs,
they are no longer reliant on the legacy phylink behaviour. We detect
this by the use of this infrastructure, or the lack of any serdes.

Signed-off-by: default avatarRussell King (Oracle) <rmk+kernel@armlinux.org.uk>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 40da0c32
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+48 −0
Original line number Diff line number Diff line
@@ -844,6 +844,31 @@ static void mv88e6xxx_get_caps(struct dsa_switch *ds, int port,
		__set_bit(PHY_INTERFACE_MODE_GMII,
			  config->supported_interfaces);
	}

	/* If we have a .pcs_ops, or don't have a .serdes_pcs_get_state,
	 * serdes_pcs_config, serdes_pcs_an_restart, or serdes_pcs_link_up,
	 * we are not legacy.
	 */
	if (chip->info->ops->pcs_ops ||
	    (!chip->info->ops->serdes_pcs_get_state &&
	     !chip->info->ops->serdes_pcs_config &&
	     !chip->info->ops->serdes_pcs_an_restart &&
	     !chip->info->ops->serdes_pcs_link_up))
		config->legacy_pre_march2020 = false;
}

static struct phylink_pcs *mv88e6xxx_mac_select_pcs(struct dsa_switch *ds,
						    int port,
						    phy_interface_t interface)
{
	struct mv88e6xxx_chip *chip = ds->priv;
	struct phylink_pcs *pcs = ERR_PTR(-EOPNOTSUPP);

	if (chip->info->ops->pcs_ops)
		pcs = chip->info->ops->pcs_ops->pcs_select(chip, port,
							   interface);

	return pcs;
}

static int mv88e6xxx_mac_prepare(struct dsa_switch *ds, int port,
@@ -3582,6 +3607,10 @@ static int mv88e6xxx_port_enable(struct dsa_switch *ds, int port,
	struct mv88e6xxx_chip *chip = ds->priv;
	int err;

	/* Do not control power or request irqs if using PCS */
	if (chip->info->ops->pcs_ops)
		return 0;

	mv88e6xxx_reg_lock(chip);
	err = mv88e6xxx_serdes_power(chip, port, true);
	mv88e6xxx_reg_unlock(chip);
@@ -3593,6 +3622,10 @@ static void mv88e6xxx_port_disable(struct dsa_switch *ds, int port)
{
	struct mv88e6xxx_chip *chip = ds->priv;

	/* Do not control power or request irqs if using PCS */
	if (chip->info->ops->pcs_ops)
		return;

	mv88e6xxx_reg_lock(chip);
	if (mv88e6xxx_serdes_power(chip, port, false))
		dev_err(chip->dev, "failed to power off SERDES\n");
@@ -4061,12 +4094,26 @@ static int mv88e6xxx_setup(struct dsa_switch *ds)

static int mv88e6xxx_port_setup(struct dsa_switch *ds, int port)
{
	struct mv88e6xxx_chip *chip = ds->priv;
	int err;

	if (chip->info->ops->pcs_ops->pcs_init) {
		err = chip->info->ops->pcs_ops->pcs_init(chip, port);
		if (err)
			return err;
	}

	return mv88e6xxx_setup_devlink_regions_port(ds, port);
}

static void mv88e6xxx_port_teardown(struct dsa_switch *ds, int port)
{
	struct mv88e6xxx_chip *chip = ds->priv;

	mv88e6xxx_teardown_devlink_regions_port(ds, port);

	if (chip->info->ops->pcs_ops->pcs_teardown)
		chip->info->ops->pcs_ops->pcs_teardown(chip, port);
}

static int mv88e6xxx_get_eeprom_len(struct dsa_switch *ds)
@@ -7061,6 +7108,7 @@ static const struct dsa_switch_ops mv88e6xxx_switch_ops = {
	.port_setup		= mv88e6xxx_port_setup,
	.port_teardown		= mv88e6xxx_port_teardown,
	.phylink_get_caps	= mv88e6xxx_get_caps,
	.phylink_mac_select_pcs	= mv88e6xxx_mac_select_pcs,
	.phylink_mac_link_state	= mv88e6xxx_serdes_pcs_get_state,
	.phylink_mac_prepare	= mv88e6xxx_mac_prepare,
	.phylink_mac_config	= mv88e6xxx_mac_config,
+12 −0
Original line number Diff line number Diff line
@@ -205,6 +205,7 @@ struct mv88e6xxx_irq_ops;
struct mv88e6xxx_gpio_ops;
struct mv88e6xxx_avb_ops;
struct mv88e6xxx_ptp_ops;
struct mv88e6xxx_pcs_ops;

struct mv88e6xxx_irq {
	u16 masked;
@@ -288,6 +289,7 @@ struct mv88e6xxx_port {
	unsigned int serdes_irq;
	char serdes_irq_name[64];
	struct devlink_region *region;
	void *pcs_private;

	/* MacAuth Bypass control flag */
	bool mab;
@@ -664,6 +666,8 @@ struct mv88e6xxx_ops {
	void (*phylink_get_caps)(struct mv88e6xxx_chip *chip, int port,
				 struct phylink_config *config);

	const struct mv88e6xxx_pcs_ops *pcs_ops;

	/* Max Frame Size */
	int (*set_max_frame_size)(struct mv88e6xxx_chip *chip, int mtu);
};
@@ -736,6 +740,14 @@ struct mv88e6xxx_ptp_ops {
	u32 cc_mult_dem;
};

struct mv88e6xxx_pcs_ops {
	int (*pcs_init)(struct mv88e6xxx_chip *chip, int port);
	void (*pcs_teardown)(struct mv88e6xxx_chip *chip, int port);
	struct phylink_pcs *(*pcs_select)(struct mv88e6xxx_chip *chip, int port,
					  phy_interface_t mode);

};

#define STATS_TYPE_PORT		BIT(0)
#define STATS_TYPE_BANK0	BIT(1)
#define STATS_TYPE_BANK1	BIT(2)