Commit b8d27d2c authored by Ninad Malwade's avatar Ninad Malwade Committed by Guenter Roeck
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hwmon: (ina3221) Fix shunt sum critical calculation 



The shunt sum critical limit register value should be left shifted
by one bit as its LSB-0 is a reserved bit.

Fixes: 2057bdfb ("hwmon: (ina3221) Add summation feature support")
Signed-off-by: default avatarNinad Malwade <nmalwade@nvidia.com>
Reviewed-by: default avatarThierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20221108044508.23463-1-nmalwade@nvidia.com


Signed-off-by: default avatarGuenter Roeck <linux@roeck-us.net>
parent 07e06193

drivers/hwmon/ina3221.c

+2 −2
Original line number Diff line number Diff line
@@ -228,7 +228,7 @@ static int ina3221_read_value(struct ina3221_data *ina, unsigned int reg, 
	 * Shunt Voltage Sum register has 14-bit value with 1-bit shift

	 * Other Shunt Voltage registers have 12 bits with 3-bit shift

	 */

	if (reg == INA3221_SHUNT_SUM)

	if (reg == INA3221_SHUNT_SUM || reg == INA3221_CRIT_SUM)

		*val = sign_extend32(regval >> 1, 14);

	else

		*val = sign_extend32(regval >> 3, 12);
@@ -465,7 +465,7 @@ static int ina3221_write_curr(struct device *dev, u32 attr, 
	 *     SHUNT_SUM: (1 / 40uV) << 1 = 1 / 20uV

	 *     SHUNT[1-3]: (1 / 40uV) << 3 = 1 / 5uV

	 */

	if (reg == INA3221_SHUNT_SUM)

	if (reg == INA3221_SHUNT_SUM || reg == INA3221_CRIT_SUM)

		regval = DIV_ROUND_CLOSEST(voltage_uv, 20) & 0xfffe;

	else

		regval = DIV_ROUND_CLOSEST(voltage_uv, 5) & 0xfff8;