Unverified Commit b8d20195 authored by openeuler-ci-bot's avatar openeuler-ci-bot Committed by Gitee
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!2888 OLK-5.10: GNR-SRF new KVM ISA support

Merge Pull Request from: @quanxianwang 
 
Title: GNR-SRF new KVM ISA support

Content: Support new KVM instructions in Granite Rapids and Sierra Forest platform.
Add support following instruction in CPUID enumeration.
CMPCCXADD
AMX-FP16
AVX-NE-CONVERT
AVX-IFMA
PREFETCHIT0-1
AVX-VNNI-INT8

Commits:
commit c4690d01 ("KVM: x86: Add BUILD_BUG_ON() to detect bad usage of "scattered" flags")
commit 047c7229 ("KVM: x86: Update KVM-only leaf handling to allow for 100% KVM-only leafs")
commit 6a19d7aa ("x86: KVM: Advertise CMPccXADD CPUID to user space")
commit af2872f6 ("x86: KVM: Advertise AMX-FP16 CPUID to user space")
commit 5e85c4eb ("x86: KVM: Advertise AVX-IFMA CPUID to user space")
commit 24d74b9f ("KVM: x86: Advertise AVX-VNNI-INT8 CPUID to user space")
commit 9977f087 ("KVM: x86: Advertise AVX-NE-CONVERT CPUID to user space")
commit 29c46979 ("KVM: x86: Advertise PREFETCHIT0/1 CPUID to user space")

#I8GYV5: Add GNR/SRF new ISA support

Test:
Boot test on GNR/SRF server and check cpuid output to confirm instruction is enabled: PASS

Known issue:
N/A

Default config change:
N/A 
 
Link:https://gitee.com/openeuler/kernel/pulls/2888

 

Reviewed-by: default avatarJason Zeng <jason.zeng@intel.com>
Reviewed-by: default avatarAichun Shi <aichun.shi@intel.com>
Reviewed-by: default avatarKevin Zhu <zhukeqian1@huawei.com>
Signed-off-by: default avatarJialin Zhang <zhangjialin11@huawei.com>
parents 5a39e8f3 30b35835
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+3 −0
Original line number Diff line number Diff line
@@ -332,9 +332,12 @@
/* Intel-defined CPU features, CPUID level 0x00000007:1 (EAX), word 12 */
#define X86_FEATURE_AVX_VNNI		(12*32+ 4) /* AVX VNNI instructions */
#define X86_FEATURE_AVX512_BF16		(12*32+ 5) /* AVX512 BFLOAT16 instructions */
#define X86_FEATURE_CMPCCXADD           (12*32+ 7) /* "" CMPccXADD instructions */
#define X86_FEATURE_FZRM		(12*32+10) /* "" Fast zero-length REP MOVSB */
#define X86_FEATURE_FSRS		(12*32+11) /* "" Fast short REP STOSB */
#define X86_FEATURE_FSRC		(12*32+12) /* "" Fast short REP {CMPSB,SCASB} */
#define X86_FEATURE_AMX_FP16		(12*32+21) /* "" AMX fp16 Support */
#define X86_FEATURE_AVX_IFMA            (12*32+23) /* "" Support for VPMADD52[H,L]UQ */

/* AMD-defined CPU features, CPUID level 0x80000008 (EBX), word 13 */
#define X86_FEATURE_CLZERO		(13*32+ 0) /* CLZERO instruction */
+18 −8
Original line number Diff line number Diff line
@@ -58,7 +58,13 @@ u32 xstate_required_size(u64 xstate_bv, bool compacted)
}

#define F feature_bit
#define SF(name) (boot_cpu_has(X86_FEATURE_##name) ? F(name) : 0)

/* Scattered Flag - For features that are scattered by cpufeatures.h. */
#define SF(name)						\
({								\
	BUILD_BUG_ON(X86_FEATURE_##name >= MAX_CPU_FEATURES);	\
	(boot_cpu_has(X86_FEATURE_##name) ? F(name) : 0);	\
})

static inline struct kvm_cpuid_entry2 *cpuid_entry2_find(
	struct kvm_cpuid_entry2 *entries, int nent, u32 function, u32 index)
@@ -383,9 +389,9 @@ static __always_inline void __kvm_cpu_cap_mask(unsigned int leaf)
}

static __always_inline
void kvm_cpu_cap_init_scattered(enum kvm_only_cpuid_leafs leaf, u32 mask)
void kvm_cpu_cap_init_kvm_defined(enum kvm_only_cpuid_leafs leaf, u32 mask)
{
	/* Use kvm_cpu_cap_mask for non-scattered leafs. */
	/* Use kvm_cpu_cap_mask for leafs that aren't KVM-only. */
	BUILD_BUG_ON(leaf < NCAPINTS);

	kvm_cpu_caps[leaf] = mask;
@@ -395,7 +401,7 @@ void kvm_cpu_cap_init_scattered(enum kvm_only_cpuid_leafs leaf, u32 mask)

static __always_inline void kvm_cpu_cap_mask(enum cpuid_leafs leaf, u32 mask)
{
	/* Use kvm_cpu_cap_init_scattered for scattered leafs. */
	/* Use kvm_cpu_cap_init_kvm_defined for KVM-only leafs. */
	BUILD_BUG_ON(leaf >= NCAPINTS);

	kvm_cpu_caps[leaf] &= mask;
@@ -497,15 +503,19 @@ void kvm_set_cpu_caps(void)
		kvm_cpu_cap_set(X86_FEATURE_SPEC_CTRL_SSBD);

	kvm_cpu_cap_mask(CPUID_7_1_EAX,
		F(AVX_VNNI) | F(AVX512_BF16) |
		F(FZRM) | F(FSRS) | F(FSRC)
		F(AVX_VNNI) | F(AVX512_BF16) | F(CMPCCXADD) | F(AMX_FP16) |
		F(AVX_IFMA) | F(FZRM) | F(FSRS) | F(FSRC)
	);

	kvm_cpu_cap_init_kvm_defined(CPUID_7_1_EDX,
		F(AVX_VNNI_INT8) | F(AVX_NE_CONVERT) | F(PREFETCHITI)
	);

	kvm_cpu_cap_mask(CPUID_D_1_EAX,
		F(XSAVEOPT) | F(XSAVEC) | F(XGETBV1) | F(XSAVES) | f_xfd
	);

	kvm_cpu_cap_init_scattered(CPUID_12_EAX,
	kvm_cpu_cap_init_kvm_defined(CPUID_12_EAX,
		SF(SGX1) | SF(SGX2) | SF(SGX_EDECCSSA)
	);

@@ -740,9 +750,9 @@ static inline int __do_cpuid_func(struct kvm_cpuid_array *array, u32 function)
				goto out;

			cpuid_entry_override(entry, CPUID_7_1_EAX);
			cpuid_entry_override(entry, CPUID_7_1_EDX);
			entry->ebx = 0;
			entry->ecx = 0;
			entry->edx = 0;
		}
		break;
	case 0xa: { /* Architectural Performance Monitoring */
+22 −3
Original line number Diff line number Diff line
@@ -8,18 +8,31 @@
#include <uapi/asm/kvm_para.h>

/*
 * Hardware-defined CPUID leafs that are scattered in the kernel, but need to
 * be directly used by KVM.  Note, these word values conflict with the kernel's
 * "bug" caps, but KVM doesn't use those.
 * Hardware-defined CPUID leafs that are either scattered by the kernel or are
 * unknown to the kernel, but need to be directly used by KVM.  Note, these
 * word values conflict with the kernel's "bug" caps, but KVM doesn't use those.
 */
enum kvm_only_cpuid_leafs {
	CPUID_12_EAX	 = NCAPINTS,
	CPUID_7_1_EDX,
	CPUID_8000_0021_EAX,
	NR_KVM_CPU_CAPS,

	NKVMCAPINTS = NR_KVM_CPU_CAPS - NCAPINTS,
};

/*
 * Define a KVM-only feature flag.
 *
 * For features that are scattered by cpufeatures.h, __feature_translate() also
 * needs to be updated to translate the kernel-defined feature into the
 * KVM-defined feature.
 *
 * For features that are 100% KVM-only, i.e. not defined by cpufeatures.h,
 * forego the intermediate KVM_X86_FEATURE and directly define X86_FEATURE_* so
 * that X86_FEATURE_* can be used in KVM.  No __feature_translate() handling is
 * needed in this case.
 */
#define KVM_X86_FEATURE(w, f)		((w)*32 + (f))

/* Intel-defined SGX sub-features, CPUID level 0x12 (EAX). */
@@ -68,6 +81,11 @@ static inline bool kvm_vcpu_is_illegal_gpa(struct kvm_vcpu *vcpu, gpa_t gpa)
	return (gpa >= BIT_ULL(cpuid_maxphyaddr(vcpu)));
}

/* Intel-defined sub-features, CPUID level 0x00000007:1 (EDX) */
#define X86_FEATURE_AVX_VNNI_INT8       KVM_X86_FEATURE(CPUID_7_1_EDX, 4)
#define X86_FEATURE_AVX_NE_CONVERT      KVM_X86_FEATURE(CPUID_7_1_EDX, 5)
#define X86_FEATURE_PREFETCHITI         KVM_X86_FEATURE(CPUID_7_1_EDX, 14)

struct cpuid_reg {
	u32 function;
	u32 index;
@@ -91,6 +109,7 @@ static const struct cpuid_reg reverse_cpuid[] = {
	[CPUID_7_EDX]         = {         7, 0, CPUID_EDX},
	[CPUID_7_1_EAX]       = {         7, 1, CPUID_EAX},
	[CPUID_12_EAX]        = {0x00000012, 0, CPUID_EAX},
	[CPUID_7_1_EDX]       = {         7, 1, CPUID_EDX},
	[CPUID_8000_0021_EAX] = {0x80000021, 0, CPUID_EAX},
};