Commit b8c97866 authored by Felix Fietkau's avatar Felix Fietkau
Browse files

mt76: mt7615: use full on-chip memory address for WF_PHY registers



Now that the bus access functions can use mapping for accessing full
register addresses, use it for WF_PHY registers to keep them constant.
Needed for follow-up work on testmode support

Signed-off-by: default avatarFelix Fietkau <nbd@nbd.name>
parent dc804058
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+0 −2
Original line number Diff line number Diff line
@@ -17,7 +17,6 @@ const u32 mt7615e_reg_map[] = {
	[MT_CSR_BASE]		= 0x07000,
	[MT_PLE_BASE]		= 0x08000,
	[MT_PSE_BASE]		= 0x0c000,
	[MT_PHY_BASE]		= 0x10000,
	[MT_CFG_BASE]		= 0x20200,
	[MT_AGG_BASE]		= 0x20a00,
	[MT_TMAC_BASE]		= 0x21000,
@@ -44,7 +43,6 @@ const u32 mt7663e_reg_map[] = {
	[MT_CSR_BASE]		= 0x07000,
	[MT_PLE_BASE]		= 0x08000,
	[MT_PSE_BASE]		= 0x0c000,
	[MT_PHY_BASE]		= 0x10000,
	[MT_CFG_BASE]		= 0x20000,
	[MT_AGG_BASE]		= 0x22000,
	[MT_TMAC_BASE]		= 0x24000,
+1 −2
Original line number Diff line number Diff line
@@ -14,7 +14,6 @@ enum mt7615_reg_base {
	MT_CSR_BASE,
	MT_PLE_BASE,
	MT_PSE_BASE,
	MT_PHY_BASE,
	MT_CFG_BASE,
	MT_AGG_BASE,
	MT_TMAC_BASE,
@@ -169,7 +168,7 @@ enum mt7615_reg_base {
#define MT_PSE_PG_INFO			MT_PSE(0x194)
#define MT_PSE_SRC_CNT			GENMASK(27, 16)

#define MT_WF_PHY_BASE			((dev)->reg_map[MT_PHY_BASE])
#define MT_WF_PHY_BASE			0x82070000
#define MT_WF_PHY(ofs)			(MT_WF_PHY_BASE + (ofs))

#define MT_WF_PHY_WF2_RFCTRL0(n)	MT_WF_PHY(0x1900 + (n) * 0x400)
+0 −1
Original line number Diff line number Diff line
@@ -25,7 +25,6 @@ static const u32 mt7663u_reg_map[] = {
	[MT_TOP_MISC_BASE]	= 0x81020000,
	[MT_PLE_BASE]		= 0x82060000,
	[MT_PSE_BASE]		= 0x82068000,
	[MT_PHY_BASE]		= 0x82070000,
	[MT_WTBL_BASE_ADDR]	= 0x820e0000,
	[MT_CFG_BASE]		= 0x820f0000,
	[MT_AGG_BASE]		= 0x820f2000,