Commit b87ba366 authored by Leo Yan's avatar Leo Yan Committed by Zheng Zengkai
Browse files

perf arm-spe: Refactor operation packet handling

mainline inclusion
from mainline-v5.11-rc1
commit e771218f
category: feature
bugzilla: https://gitee.com/openeuler/kernel/issues/I4NGPV


CVE: NA

-------------------------------------------------

Defines macros for operation packet header and formats (support sub
classes for 'other', 'branch', 'load and store', etc).  Uses these
macros for operation packet decoding and dumping.

Signed-off-by: default avatarLeo Yan <leo.yan@linaro.org>
Reviewed-by: default avatarAndre Przywara <andre.przywara@arm.com>
Acked-by: default avatarWill Deacon <will@kernel.org>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Al Grant <Al.Grant@arm.com>
Cc: Arnaldo Carvalho de Melo <acme@kernel.org>
Cc: Dave Martin <Dave.Martin@arm.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: James Clark <james.clark@arm.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: John Garry <john.garry@huawei.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Wei Li <liwei391@huawei.com>
Link: https://lore.kernel.org/r/20201119152441.6972-14-leo.yan@linaro.org


Signed-off-by: default avatarArnaldo Carvalho de Melo <acme@redhat.com>
Signed-off-by: default avatarWei Li <liwei391@huawei.com>
Reviewed-by: default avatarYang Jihong <yangjihong1@huawei.com>
Signed-off-by: default avatarZheng Zengkai <zhengzengkai@huawei.com>
parent b38b4789
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+14 −12
Original line number Diff line number Diff line
@@ -144,7 +144,7 @@ static int arm_spe_get_op_type(const unsigned char *buf, size_t len,
			       struct arm_spe_pkt *packet)
{
	packet->type = ARM_SPE_OP_TYPE;
	packet->index = buf[0] & 0x3;
	packet->index = SPE_OP_PKT_HDR_CLASS(buf[0]);
	return arm_spe_get_payload(buf, len, 0, packet);
}

@@ -328,31 +328,33 @@ static int arm_spe_pkt_desc_op_type(const struct arm_spe_pkt *packet,
	int err = 0;

	switch (packet->index) {
	case 0:
	case SPE_OP_PKT_HDR_CLASS_OTHER:
		arm_spe_pkt_out_string(&err, &buf, &buf_len,
				payload & 0x1 ? "COND-SELECT" : "INSN-OTHER");
			payload & SPE_OP_PKT_COND ? "COND-SELECT" : "INSN-OTHER");
		break;
	case 1:
	case SPE_OP_PKT_HDR_CLASS_LD_ST_ATOMIC:
		arm_spe_pkt_out_string(&err, &buf, &buf_len,
				       payload & 0x1 ? "ST" : "LD");

		if (payload & 0x2) {
			if (payload & 0x4)
		if (SPE_OP_PKT_IS_LDST_ATOMIC(payload)) {
			if (payload & SPE_OP_PKT_AT)
				arm_spe_pkt_out_string(&err, &buf, &buf_len, " AT");
			if (payload & 0x8)
			if (payload & SPE_OP_PKT_EXCL)
				arm_spe_pkt_out_string(&err, &buf, &buf_len, " EXCL");
			if (payload & 0x10)
			if (payload & SPE_OP_PKT_AR)
				arm_spe_pkt_out_string(&err, &buf, &buf_len, " AR");
		} else if (payload & 0x4) {
		} else if (SPE_OP_PKT_LDST_SUBCLASS_GET(payload) ==
					SPE_OP_PKT_LDST_SUBCLASS_SIMD_FP) {
			arm_spe_pkt_out_string(&err, &buf, &buf_len, " SIMD-FP");
		}
		break;
	case 2:
	case SPE_OP_PKT_HDR_CLASS_BR_ERET:
		arm_spe_pkt_out_string(&err, &buf, &buf_len, "B");

		if (payload & 0x1)
		if (payload & SPE_OP_PKT_COND)
			arm_spe_pkt_out_string(&err, &buf, &buf_len, " COND");
		if (payload & 0x2)

		if (SPE_OP_PKT_IS_INDIRECT_BRANCH(payload))
			arm_spe_pkt_out_string(&err, &buf, &buf_len, " IND");

		break;
+23 −0
Original line number Diff line number Diff line
@@ -105,6 +105,29 @@ enum arm_spe_events {
	EV_EMPTY_PREDICATE	= 18,
};

/* Operation packet header */
#define SPE_OP_PKT_HDR_CLASS(h)			((h) & GENMASK_ULL(1, 0))
#define SPE_OP_PKT_HDR_CLASS_OTHER		0x0
#define SPE_OP_PKT_HDR_CLASS_LD_ST_ATOMIC	0x1
#define SPE_OP_PKT_HDR_CLASS_BR_ERET		0x2

#define SPE_OP_PKT_COND				BIT(0)

#define SPE_OP_PKT_LDST_SUBCLASS_GET(v)		((v) & GENMASK_ULL(7, 1))
#define SPE_OP_PKT_LDST_SUBCLASS_GP_REG		0x0
#define SPE_OP_PKT_LDST_SUBCLASS_SIMD_FP	0x4
#define SPE_OP_PKT_LDST_SUBCLASS_UNSPEC_REG	0x10
#define SPE_OP_PKT_LDST_SUBCLASS_NV_SYSREG	0x30

#define SPE_OP_PKT_IS_LDST_ATOMIC(v)		(((v) & (GENMASK_ULL(7, 5) | BIT(1))) == 0x2)

#define SPE_OP_PKT_AR				BIT(4)
#define SPE_OP_PKT_EXCL				BIT(3)
#define SPE_OP_PKT_AT				BIT(2)
#define SPE_OP_PKT_ST				BIT(0)

#define SPE_OP_PKT_IS_INDIRECT_BRANCH(v)	(((v) & GENMASK_ULL(7, 1)) == 0x2)

const char *arm_spe_pkt_name(enum arm_spe_pkt_type);

int arm_spe_get_packet(const unsigned char *buf, size_t len,