Commit b8311f46 authored by Vladimir Oltean's avatar Vladimir Oltean Committed by Paolo Abeni
Browse files

net: dsa: microchip: add an enum for regmap widths 



It is not immediately obvious that this driver allocates, via the
KSZ_REGMAP_TABLE() macro, 3 regmaps for register access: dev->regmap[0]
for 8-bit access, dev->regmap[1] for 16-bit and dev->regmap[2] for
32-bit access.

In future changes that add support for reg_fields, each field will have
to specify through which of the 3 regmaps it's going to go. Add an enum
now, to denote one of the 3 register access widths, and make the code go
through some wrapper functions for easier review and further
modification.

Signed-off-by: default avatarVladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: default avatarOleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: default avatarPaolo Abeni <pabeni@redhat.com>
parent 2f0d5799

drivers/net/dsa/microchip/ksz8795.c

+4 −4
Original line number Diff line number Diff line
@@ -28,13 +28,13 @@ 


static void ksz_cfg(struct ksz_device *dev, u32 addr, u8 bits, bool set)

{

	regmap_update_bits(dev->regmap[0], addr, bits, set ? bits : 0);

	regmap_update_bits(ksz_regmap_8(dev), addr, bits, set ? bits : 0);

}



static void ksz_port_cfg(struct ksz_device *dev, int port, int offset, u8 bits,

			 bool set)

{

	regmap_update_bits(dev->regmap[0], PORT_CTRL_ADDR(port, offset),

	regmap_update_bits(ksz_regmap_8(dev), PORT_CTRL_ADDR(port, offset),

			   bits, set ? bits : 0);

}
@@ -1425,14 +1425,14 @@ int ksz8_setup(struct dsa_switch *ds) 
	ksz_cfg(dev, S_LINK_AGING_CTRL, SW_LINK_AUTO_AGING, true);



	/* Enable aggressive back off algorithm in half duplex mode. */

	regmap_update_bits(dev->regmap[0], REG_SW_CTRL_1,

	regmap_update_bits(ksz_regmap_8(dev), REG_SW_CTRL_1,

			   SW_AGGR_BACKOFF, SW_AGGR_BACKOFF);



	/*

	 * Make sure unicast VLAN boundary is set as default and

	 * enable no excessive collision drop.

	 */

	regmap_update_bits(dev->regmap[0], REG_SW_CTRL_2,

	regmap_update_bits(ksz_regmap_8(dev), REG_SW_CTRL_2,

			   UNICAST_VLAN_BOUNDARY | NO_EXC_COLLISION_DROP,

			   UNICAST_VLAN_BOUNDARY | NO_EXC_COLLISION_DROP);

drivers/net/dsa/microchip/ksz8863_smi.c

+1 −1
Original line number Diff line number Diff line
@@ -136,7 +136,7 @@ static int ksz8863_smi_probe(struct mdio_device *mdiodev) 
	if (!dev)

		return -ENOMEM;



	for (i = 0; i < ARRAY_SIZE(ksz8863_regmap_config); i++) {

	for (i = 0; i < __KSZ_NUM_REGMAPS; i++) {

		rc = ksz8863_regmap_config[i];

		rc.lock_arg = &dev->regmap_mutex;

		dev->regmap[i] = devm_regmap_init(&mdiodev->dev,

drivers/net/dsa/microchip/ksz9477.c

+12 −12
Original line number Diff line number Diff line
@@ -21,25 +21,25 @@ 


static void ksz_cfg(struct ksz_device *dev, u32 addr, u8 bits, bool set)

{

	regmap_update_bits(dev->regmap[0], addr, bits, set ? bits : 0);

	regmap_update_bits(ksz_regmap_8(dev), addr, bits, set ? bits : 0);

}



static void ksz_port_cfg(struct ksz_device *dev, int port, int offset, u8 bits,

			 bool set)

{

	regmap_update_bits(dev->regmap[0], PORT_CTRL_ADDR(port, offset),

	regmap_update_bits(ksz_regmap_8(dev), PORT_CTRL_ADDR(port, offset),

			   bits, set ? bits : 0);

}



static void ksz9477_cfg32(struct ksz_device *dev, u32 addr, u32 bits, bool set)

{

	regmap_update_bits(dev->regmap[2], addr, bits, set ? bits : 0);

	regmap_update_bits(ksz_regmap_32(dev), addr, bits, set ? bits : 0);

}



static void ksz9477_port_cfg32(struct ksz_device *dev, int port, int offset,

			       u32 bits, bool set)

{

	regmap_update_bits(dev->regmap[2], PORT_CTRL_ADDR(port, offset),

	regmap_update_bits(ksz_regmap_32(dev), PORT_CTRL_ADDR(port, offset),

			   bits, set ? bits : 0);

}
@@ -52,7 +52,7 @@ int ksz9477_change_mtu(struct ksz_device *dev, int port, int mtu) 


	frame_size = mtu + VLAN_ETH_HLEN + ETH_FCS_LEN;



	return regmap_update_bits(dev->regmap[1], REG_SW_MTU__2,

	return regmap_update_bits(ksz_regmap_16(dev), REG_SW_MTU__2,

				  REG_SW_MTU_MASK, frame_size);

}
@@ -60,7 +60,7 @@ static int ksz9477_wait_vlan_ctrl_ready(struct ksz_device *dev) 
{

	unsigned int val;



	return regmap_read_poll_timeout(dev->regmap[0], REG_SW_VLAN_CTRL,

	return regmap_read_poll_timeout(ksz_regmap_8(dev), REG_SW_VLAN_CTRL,

					val, !(val & VLAN_START), 10, 1000);

}
@@ -147,7 +147,7 @@ static int ksz9477_wait_alu_ready(struct ksz_device *dev) 
{

	unsigned int val;



	return regmap_read_poll_timeout(dev->regmap[2], REG_SW_ALU_CTRL__4,

	return regmap_read_poll_timeout(ksz_regmap_32(dev), REG_SW_ALU_CTRL__4,

					val, !(val & ALU_START), 10, 1000);

}
@@ -155,7 +155,7 @@ static int ksz9477_wait_alu_sta_ready(struct ksz_device *dev) 
{

	unsigned int val;



	return regmap_read_poll_timeout(dev->regmap[2],

	return regmap_read_poll_timeout(ksz_regmap_32(dev),

					REG_SW_ALU_STAT_CTRL__4,

					val, !(val & ALU_STAT_START),

					10, 1000);
@@ -170,7 +170,7 @@ int ksz9477_reset_switch(struct ksz_device *dev) 
	ksz_cfg(dev, REG_SW_OPERATION, SW_RESET, true);



	/* turn off SPI DO Edge select */

	regmap_update_bits(dev->regmap[0], REG_SW_GLOBAL_SERIAL_CTRL_0,

	regmap_update_bits(ksz_regmap_8(dev), REG_SW_GLOBAL_SERIAL_CTRL_0,

			   SPI_AUTO_EDGE_DETECTION, 0);



	/* default configuration */
@@ -213,7 +213,7 @@ void ksz9477_r_mib_cnt(struct ksz_device *dev, int port, u16 addr, u64 *cnt) 
	data |= (addr << MIB_COUNTER_INDEX_S);

	ksz_pwrite32(dev, port, REG_PORT_MIB_CTRL_STAT__4, data);



	ret = regmap_read_poll_timeout(dev->regmap[2],

	ret = regmap_read_poll_timeout(ksz_regmap_32(dev),

			PORT_CTRL_ADDR(port, REG_PORT_MIB_CTRL_STAT__4),

			val, !(val & MIB_COUNTER_READ), 10, 1000);

	/* failed to read MIB. get out of loop */
@@ -346,7 +346,7 @@ void ksz9477_flush_dyn_mac_table(struct ksz_device *dev, int port) 
	const u16 *regs = dev->info->regs;

	u8 data;



	regmap_update_bits(dev->regmap[0], REG_SW_LUE_CTRL_2,

	regmap_update_bits(ksz_regmap_8(dev), REG_SW_LUE_CTRL_2,

			   SW_FLUSH_OPTION_M << SW_FLUSH_OPTION_S,

			   SW_FLUSH_OPTION_DYN_MAC << SW_FLUSH_OPTION_S);
@@ -1165,7 +1165,7 @@ int ksz9477_setup(struct dsa_switch *ds) 
	ksz_cfg(dev, REG_SW_MAC_CTRL_1, SW_JUMBO_PACKET, true);



	/* Now we can configure default MTU value */

	ret = regmap_update_bits(dev->regmap[1], REG_SW_MTU__2, REG_SW_MTU_MASK,

	ret = regmap_update_bits(ksz_regmap_16(dev), REG_SW_MTU__2, REG_SW_MTU_MASK,

				 VLAN_ETH_FRAME_LEN + ETH_FCS_LEN);

	if (ret)

		return ret;

drivers/net/dsa/microchip/ksz9477_i2c.c

+1 −1
Original line number Diff line number Diff line
@@ -24,7 +24,7 @@ static int ksz9477_i2c_probe(struct i2c_client *i2c) 
	if (!dev)

		return -ENOMEM;



	for (i = 0; i < ARRAY_SIZE(ksz9477_regmap_config); i++) {

	for (i = 0; i < __KSZ_NUM_REGMAPS; i++) {

		rc = ksz9477_regmap_config[i];

		rc.lock_arg = &dev->regmap_mutex;

		dev->regmap[i] = devm_regmap_init_i2c(i2c, &rc);

drivers/net/dsa/microchip/ksz_common.c

+3 −3
Original line number Diff line number Diff line
@@ -2095,7 +2095,7 @@ static int ksz_setup(struct dsa_switch *ds) 
	}



	/* set broadcast storm protection 10% rate */

	regmap_update_bits(dev->regmap[1], regs[S_BROADCAST_CTRL],

	regmap_update_bits(ksz_regmap_16(dev), regs[S_BROADCAST_CTRL],

			   BROADCAST_STORM_RATE,

			   (BROADCAST_STORM_VALUE *

			   BROADCAST_STORM_PROT_RATE) / 100);
@@ -2106,7 +2106,7 @@ static int ksz_setup(struct dsa_switch *ds) 


	ds->num_tx_queues = dev->info->num_tx_queues;



	regmap_update_bits(dev->regmap[0], regs[S_MULTICAST_CTRL],

	regmap_update_bits(ksz_regmap_8(dev), regs[S_MULTICAST_CTRL],

			   MULTICAST_STORM_DISABLE, MULTICAST_STORM_DISABLE);



	ksz_init_mib_timer(dev);
@@ -2156,7 +2156,7 @@ static int ksz_setup(struct dsa_switch *ds) 
	}



	/* start switch */

	regmap_update_bits(dev->regmap[0], regs[S_START_CTRL],

	regmap_update_bits(ksz_regmap_8(dev), regs[S_START_CTRL],

			   SW_START, SW_START);



	return 0;