Commit b81c57f2 authored by Perry Yuan's avatar Perry Yuan Committed by wangzy115
Browse files

x86/CPU/AMD: Add models 0x60-0x6f to the Zen5 range 

mainline inclusion
from mainline-v6.11-rc2
commit bf5641eccf71bcd13a849930e190563c3a19815d
category: feature
bugzilla: https://gitee.com/openeuler/kernel/issues/IB69GC


CVE: NA

--------------------------------

Add some new Zen5 models for the 0x1A family.

  [ bp: Merge the 0x60 and 0x70 ranges. ]

Signed-off-by: default avatarPerry Yuan <perry.yuan@amd.com>
Signed-off-by: default avatarBorislav Petkov (AMD) <bp@alien8.de>
Link: https://lore.kernel.org/r/20240729064626.24297-1-bp@kernel.org


Signed-off-by: default avatarwangzy115 <wangzy115@lenovo.com>
parent 736ffed1

arch/x86/kernel/cpu/amd.c

+1 −1
Original line number Diff line number Diff line
@@ -634,7 +634,7 @@ static void bsp_init_amd(struct cpuinfo_x86 *c) 
		switch (c->x86_model) {

		case 0x00 ... 0x2f:

		case 0x40 ... 0x4f:

		case 0x70 ... 0x7f:

		case 0x60 ... 0x7f:

			setup_force_cpu_cap(X86_FEATURE_ZEN5);

			break;

		default: