Commit b7f64eae authored by Yoshihiro Shimoda's avatar Yoshihiro Shimoda Committed by Geert Uytterhoeven
Browse files

clk: renesas: r8a779f0: Add PCIe clocks 



Add the module clocks used by the PCIe controllers on the Renesas
R-Car S4-8 (R8A779F0) SoC.

Signed-off-by: default avatarYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20220613115627.2831257-1-yoshihiro.shimoda.uh@renesas.com


Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent d5c10876

drivers/clk/renesas/r8a779f0-cpg-mssr.c

+2 −0
Original line number Diff line number Diff line
@@ -126,6 +126,8 @@ static const struct mssr_mod_clk r8a779f0_mod_clks[] __initconst = { 
	DEF_MOD("i2c3",		521,	R8A779F0_CLK_S0D6_PER),

	DEF_MOD("i2c4",		522,	R8A779F0_CLK_S0D6_PER),

	DEF_MOD("i2c5",		523,	R8A779F0_CLK_S0D6_PER),

	DEF_MOD("pcie0",	624,	R8A779F0_CLK_S0D2),

	DEF_MOD("pcie1",	625,	R8A779F0_CLK_S0D2),

	DEF_MOD("scif0",	702,	R8A779F0_CLK_S0D12_PER),

	DEF_MOD("scif1",	703,	R8A779F0_CLK_S0D12_PER),

	DEF_MOD("scif3",	704,	R8A779F0_CLK_S0D12_PER),